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P1076 August 6, 2015 Meeting Minutes
Attendees:
Brent Hayhoe, Rob Gaddi, Jim Lewis, Lieven Lemiengre, Peter Flake, Ernst Christen
Agenda:
Meeting Discussion
Reference Links
Review and Approve Meeting Minutes:
Next Meeting: Thursday August 20, 2015, 11 am Pacific
Previous Meeting: Thursday July 23, 2015
Meeting Discussion
Reviewed Interface Requirements:
InterfaceAcceptedRequirements
DPI - Peter has updated, Please review
DpiProposal
Peter would appreciate help with formatting in the document
Next Meeting: Review Use Models
Reference Links
Ernst's Proposals
Heterogeneous Interfaces
Heterogeneous Interface Requirements
Overview of SystemVerilog Interfaces
Bundles in VHDL
Brent Hayhoe: Comments
Daniel Kho: Comments
Status Quo and Moving Forward
Brent Summaries:
Interface Mode Requirements
Interface Bundle Requirements
Proposals:
Records with Directional Subtypes
-
Peter Flake
Add a "Bus" port mode for bidirectional port signals
-
Brian Drummond
Interface Construct and Port Mode Configurations
-
Brent Hayhoe
Interfaces: Packages as an Interface Construct
-
Jim Lewis
Protected Types with Public Signals
-
Jim Lewis
Protected Type: Shared Variables On Entity Interface
-
Jim Lewis
Record Introspection
-
Chris Higgs
Record Introspection & Indexing
-
Brent Hayhoe
Generics on Protected Types
-
Jim Lewis
Attributes for interfaces
-
John Aasen
IR2067 - Logical link interface abstraction
- Martin Trautmann, analyzed:
Peter Ashenden
IR2076 - a member attribute for records
- Rickard Norberg
IR2089 - Directional Records
- Andreas Doering, never analyzed
IEEE 200X FT-17 - Composite interface mode
-
Jim Lewis
IEEE 200X FT-14 & FT-15 - Arrays of unconstrained arrays and records with unconstrained arrays
-
Ryan Hinton
Documents:
SUAVE Language Description
-
Peter Ashenden
Interfaces
-
Jim Lewis
Object Orientation Revisited
-
Peter Ashenden
Email threads:
vhdl-200x: Requirements for VHDL Interfaces
vhdl-200x: Requirements for Interfaces
vhdl-200x: Re: Requirements for Interfaces, Part 1
vhdl-200x: Re: Requirements for Interfaces, Part 2
VHDL Interfaces (was RE: EXTERNAL: Re: vhdl-200x: VHDL enhancements wish list)
vhdl-200x: Directional records proposal
{Disarmed} Re: vhdl-200x: Directional records proposal
vhdl-200x: Records with diectional subtypes
vhdl-200x: Interfaces with normal, conjugated and monitor flavours
Review and Approve Meeting Minutes:
NA
Next Meeting: Thursday
August 20, 2015
, 11 am Pacific
Previous Meeting: Thursday
July 23, 2015
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Topic revision: r6 - 2020-02-17 - 15:36:14 -
JimLewis
P1076
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