GenericTypes < P1076

P1076 Web>Vhdl2019CollectedRequirements>GenericTypes (2020-02-17, JimLewis) (raw view)EditAttach
---+ Generics on Protected Types

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---++ Proposal Editing Information
   * Who Updates: Main.JimLewis, &lt;Add YourName &gt;, ...
   * Date Proposed: 2012-08-17
   * Date Last Updated: 2012-08-17
   * Priority:
   * Complexity:
   * Focus: Testbench
---++ Requirement Summary

Add generics to protected types. Allow generics to be specified on usage of the type - in a similar way to subtype constraints.

---++ Current Situation

When using package generics to create a data structure, the process is instantiate a package, reference the package, and then reference a type from the package. When multiple different parameterized data structures are created from the same generic package, the type names need to be instanced with fully selected path names.

---++ Related and/or Competing Issues: Protected Type Updates

---++ Proposed Extension, Part 1:

Add Generics to protected types to streamline parameterization of data structures.

Declaration of protected type interface
<verbatim>type ScoreBoardGenericPType is protected 
    generic (
        type ExpectedType ; 
        type ActualType ; 
        function check(Actual : ActualType ;  Expected : ExpectedType) return boolean 
    ) ; 
    ... 
end protected ScoreBoardGenericPType ;</verbatim>

Protected type instance:
<verbatim>type ScoreBoardPType_slv is new ScoreBoardGenericPType 
    generic map (
        ExpectedType    => std_logic_vector,  
        ActualType      => std_logic_vector,  
        check           => std_match
    ) ;  </verbatim>

Usage of the object
<verbatim>shared variable UartTxScoreboard : ScoreBoardPType_slv ; </verbatim>

---++ Proposed Extension, Part 2:

Allow generics to be specified during an object declaration in a similar manner to a subtype constraint.

Combine protected type instance and shared variable declaration

<verbatim>shared variable UartTxScoreboard : ScoreBoardGenericPType 
    generic map (
        ExpectedType    => std_logic_vector,  
        ActualType      => std_logic_vector,  
        check           => std_match
    ) ;  </verbatim>

---++ Observation

Part 1 without part 2 gives us a solution that does not have any advantage over package generics.

---++ Questions

Would there be restrictions on generic types that are locally instanced with respect to hierarchical references?

Can I use the generic type on an interface and have the actual specify the generics without it being on the formal?
---++ General Comments

Important for testbench data structures
---++ Supporters

_Add your signature here to indicate your support for the proposal_

_-- Main.JimLewis - 2014-12-03_

-- [[Main.BrentHahoe][Brent Hayhoe]] - 2014-12-23

-- Main.MortenZilmer - 2015-01-21

-- Main.PatrickLehmann - 2016-02-18

-- Main.TorstenMeissner - 2016-05-19

-- Main.DanielKho - 2016-10-01
Topic revision: r14 - 2020-02-17 - 15:34:32 - JimLewis
P1076