(r2) ConditionalReturn < P1076

P1076 Web>Vhdl2019CollectedRequirements>ConditionalReturn (revision 2) (raw view)~~EditAttach~~

---+ Conditional return statement

<br />%TOC%

---++ Proposal Editing Information
   * Who Updates: Main.JimLewis, Main.PatrickLehmann, &lt;Add YourName &gt;, ...
   * Date Proposed: 2012-08-19
   * Date Last Updated: 2016-02-19
   * Priority:
   * Complexity:
   * Focus: Testbench
---++ Requirement Summary

Conditional return statement

---++ Related and/or Competing Issues: none

---++ Use Model
<verbatim>return (Data'range => 'U') when MemArrayPtr = NULL;


return (<expression 1>) when <condition 1> else
       (<expression 2>) when <condition 2> else
       (<expression N>); -- JonnyDoin - 2013-01-03</verbatim>

---++ Proposal

---++ Questions

---++ General Comments

This conditional return mechanism is useful for synthesis, not only for testbench use. -- Main.JonnyDoin - 2013-01-03

VHDL has already conditional loop control statements:<br />- next [when condition];<br />- exit [when condition];<br />It's just fair to add conditional return statements, too.

-- Main.PatrickLehmann - 2016-02-18
---++ Supporters

-- Main.JonnyDoin - 2013-01-03

-- Main.PatrickLehmann - 2016-02-18

_Add your signature here to indicate your support for the proposal_

Topic revision: r1 - 2020-02-17 - 15:34:28 - TWikiGuest

P1076