WaitRepeat < P1076/Ballots

P1076/Ballots Web>Vhdl2019CollectedRequirements>WaitRepeat (2020-02-17, JimLewis) (raw view)EditAttach
---+ Repeat count for wait

%TOC%

---++ Proposal Editing Information
   * Who Updates: Main.JimLewis, &lt;Add YourName &gt;, ...
   * Date Proposed: 2012-08-19
   * Date Last Updated: 2012-08-19
   * Priority:
   * Complexity:
   * Focus: Testbench
---++ Requirement Summary

Add a repeat count to wait
---++ Related and/or Competing Issues: none

---++ Use Model

If PSL notation would work, it would be better to use that

<verbatim>wait until clk='1' repeat 20 ; </verbatim>

---++ Proposal

---++ Questions

---++ General Comments

This is easily implemented as a procedure (I have tick(clk,20) in my own library)

I wonder if we should keep our language changes to things which are unachievable or cause much more unpleasantness than this?

-- Main.MartinThompson - 2012-09-14

Point taken Martin and I have similar procedures for enhancing 'wait' statements. However, I am very much in favour of enhancments such as this that can reduce code in a verification environment and can enhance/speed-up comprehension for maintainability issues.

In fact I would like to add an extra: I am often wrapping 'wait' statements inside 'if' statements to check for the condition before waiting for it. I would add an either/or to the 'repeat' addition giving a new format as shown:

<p align="left" style="padding-left: 30px;">wait_statement ::=</p> <p align="left" style="padding-left: 60px;">[ label : ] *wait* [ sensitivity_clause ] [ condition_clause ] [ timeout_clause ] ;</p> <p align="left" style="padding-left: 30px;">sensitivity_clause ::= *on* sensitivity_list</p> <p align="left" style="padding-left: 30px;">sensitivity_list ::= <em>signal_</em>name { , <em>signal_</em>name }</p> <p align="left" style="padding-left: 30px;">condition_clause ::= *until* condition [ *repeat* <em>positive_</em>expression | *check* ]</p> <p align="left" style="padding-left: 30px;">condition ::= <em>boolean_</em>expression</p> <p align="left" style="padding-left: 30px;">timeout_clause ::= *for* <em>time_</em>expression</p>

-- [[Main.BrentHahoe][Brent Hayhoe]] - 2012-10-08

I've just noticed that I'm not the first to want the 'check' functionality, it was put forward here:

http://www.eda.org/isac/IRs-VHDL-2002/IR2108.txt

-- [[Main.BrentHahoe][Brent Hayhoe]] - 2012-10-11

Almost every project seems to have a waitclk() procedure somewhere. I think it's a good idea to provide a standard way to do that.

-- Main.GuyEschemann - 2013-01-16

[[Main.BrentHahoe][&lt;Brent Hayhoe&gt;]] 2014-03-20 - The repeat function will also give a neat method for waiting multiple delta cycles:
<verbatim>wait for 0 ns repeat 20 ; </verbatim>

[[Main.BrentHahoe][&lt;/Brent Hayhoe&gt;]]

---++ Supporters

-- [[Main.BrentHahoe][Brent Hayhoe]] - 2012-10-08

-- Main.MortenZilmer - 2015-01-21

-- Main.PatrickLehmann - 2016-02-19

_Add your signature here to indicate your support for the proposal_
Topic revision: r10 - 2020-02-17 - 15:35:02 - JimLewis
P1076/Ballots