VHDLCompilationPragmas < P1076/Ballots

P1076/Ballots Web>Vhdl2019CollectedRequirements>ConditionalCompilation>VHDLCompilationPragmas (2011-09-21, JohnShields) (raw view)EditAttach

This approach is to standardize on a set of pragmas(simple tool directive) that today are a proprietary pragma definition or structured comment in the VHDL language.

The syntax may be something like:

--synthesis compile on ...

--synthesis compile off

or a richer variation like:

--vhdl_comp_off [-93 | -2002 | -2008]

...

--vhdl_comp_on

If one attempts to be complete, then it is necessary to capture a good set of generic analysis kinds, tool identifications. No doubt there is simplicity here. The difficulty is that the user has no compose-ability and extensibility in the strategy. The control flow is trivial and dysfunctional (or at least not intuitive) when nested. Maybe you can fix some of this.

It is likely that some benefits will be had from this level of standardization, but it is inevitable that unforeseen needs will be met by new proprietary pragmas and may or may be adopted as a defacto standard definition.

I see this as an inferior solution, but I can imagine it can be crafted to meet most of the requirements. I can't suggest that today's defacto set, if collected, will look very clean or be easily deprecated in favor of a revised set.

%RED% I personally reject this approach in favor of a preprocessor. -- Main.JohnShields - 2011-09-21 
%ENDCOLOR%

-- Main.JohnShields - 2011-09-21

Topic revision: r1 - 2011-09-21 - 22:07:57 - JohnShields

P1076/Ballots