(r1) ShorthandSubprogram < P1076/Ballots

P1076/Ballots Web>Vhdl2019CollectedRequirements>ShorthandSubprogram (revision 1) (raw view)~~EditAttach~~

---+ Shorthand Subprogram Declarations

%TOC%

---++ Proposal Editing Information
   * Who Updates: Main.JimLewis, &lt;Add YourName &gt;, ...
   * Date Proposed: 2012-08-19
   * Date Last Updated: 2012-08-19
   * Priority:
   * Complexity:
   * Focus: Testbench
---++ Requirement Summary

Simplify related subprogram declarations.

---++ Related and/or Competing Issues: None

---++ Current Issues:

It is common to have subprograms of the following form:
<verbatim>function GenBin (
    AtLeast : integer ;  
    Min, Max, NumBin : integer 
) return CovBinType is
begin
    return  GenBin(
                   AtLeast  => AtLeast,
                   Weight   => 1,
                   Min      => Min,
                   Max      => Max,
                   NumBin   => NumBin
                ) ;
end function GenBin ; </verbatim>

---++ Use Model 1:
<verbatim>function GenBin is new GenBin 
    parameter (
        AtLeast => AtLeast, 
        Weight => 0, 
        Min => Min, 
        Max => Max, 
        NumBin => NumBin
    ) ;  </verbatim>

Alternately with alias:
<verbatim>alias GenBin is GenBin [
        AtLeast => AtLeast, 
        Weight => 0, 
        Min => Min, 
        Max => Max, 
        NumBin => NumBin return ]
</verbatim>


---++ Use Model 2:

Syntax is not complete yet.
<verbatim>Function "+" (L: unresolved_unsigned; R : std_ulogic) return unresolved_unsigned; 
Function "+" (L : std_ulogic; R: unresolved_unsigend) return unsigned is 
    new "+"[unresolved_unsigned, std_ulogic return unresolved_unsigned] 
        parameter (L => R, R =>L) ; </verbatim>

---++ Proposal

---++ Questions

---++ General Comments

---++ Supporters

_Add your signature here to indicate your support for the proposal_

-- Main.PatrickLehmann - 2016-02-19

Topic revision: r1 - 2020-02-17 - 15:35:00 - TWikiGuest

P1076/Ballots