(r1) GenericPackageIssues < P1076/Ballots

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---+ Issues with Generic-Mapped package

%TOC%

---++ Proposal Details
   * Who Updates:
   * Date Proposed:2016-09-15
   * Date Last Updated:
   * Priority:
   * Complexity:Low
   * Focus:

---+++ Current Situation

This code looks valid according to the LRM but doesn't make sense:

<verbatim>

package pkg1 is
 generic (c : natural)
 generic map (c => c)
end pkg1;</verbatim>
---+++ Requirement

---+++ Implementation details

---+++ Code Examples
---++ Use Cases
---++ Arguments FOR

---++ Arguments AGAINST

---++ General Comments

---++ Supporters

_Add your signature here to indicate your support for the proposal_


---+ Comments



Yes I thought this odd and so delved a bit further. This is apparently called a _generic-mapped package_ and I quote from Peter Ashenden&#39;s &#34;The Designer&#39;s Guide To VHDL&#34;:

&#34;While VHDL allows us to write a generic-mapped package explicitly, we would not normally do so. Rather the feature is included in the language as a definitional aid.

....

Since generic-mapped packages are not a feature intended for regular use, we won&#39;t dwell on them further.&#34;

So not much of  clue here!


-- %BUBBLESIG{BrentHahoe - 2016-09-15}%
%COMMENT%

Topic revision: r1 - 2020-02-17 - 15:34:54 - TWikiGuest

P1076/Ballots