PatrickLehmann < Main

Main Web>TWikiUsers>PatrickLehmann (2017-06-08, PatrickLehmann) (raw view)EditAttach
---++ Who am I?

After a basic education in computer science, I specialized in computer engineering, especially in FPGA designing with<br />Xilinx ISE, Xilinx Vivado and Altera Quartus-II as well in simulation and verification of such implemented designs.<br />While studding in the master program, I got involved in giving lectures and labs on hardware design, too.

My first big project was a streaming optimized controller for the Serial-ATA protocol. One major goal of this controller<br />was to be platform independent in means of FPGA device, FPGA family, FPGA vendor and even tool chain vendor<br />independability. The second project was a Gigabit-Ethernet stack for UDP/IPv4/IPv6, which had the same goals as before.

My major commitment now focuses on streaming optimized and platform independent hardware modules, which are<br />provided open source on GitHub, named PoC -Library. A second commitment is my PicoBlaze -Library, an extension to<br />the PicoBlaze processor written by Ken Chapman. This library provides a System-on-Chip ecosystem for the PicoBlaze.
---++ My Links
   * [[https://github.com/VLSI-EDA/PoC][The PoC-Library]] - an open source, vendor and plattform independent VHDL IP core library
   * [[https://github.com/Paebbels/PicoBlaze-Library][The PicoBlaze-Library]] - a System-on-FPGA ecosystem for the PicoBlaze 8-bit CPU
   * [[https://github.com/Paebbels/JSON-for-VHDL][JSON-for-VHDL]] - bringing VHDL tools to the edge by parsing JSON files in VHDL

---++ Proposals for the next VHDL revision (VHDL-2020):
   * Drived Types
      * Derived integer types (all scalar types?)
      * Derived enumerations
      * Derived records
      * Derived protected types
   * Records with discriminants
   * Reflection API
      * Create and assign values at runtime
   * Accessing Record elements (LCS 069)
   * Map functions
   * Signal map aspect (LCS 070a)
   * Operations on integers (power of 2 integers)
   * User defined attributes
   * Deferred
      * Shared Variables
      * Signals
   * Selectable Architecture
   * Protected type initialization
   * Allow work in context
   * Hierachical names
   * Slice multi dimensional arrays
   * Create range shorthand
   * State machine language

*old*
   * [[P1076.ExtendedRanges][Extended Ranges]]
   * [[P1076.ExtendedUserDefinedAttributes][Extended User Defined Attributes]]
   * Attribute Propagation Rules

---++ LCS written for VHDL-2017:
*Approved*
   1 [[P1076.LCS2016_006a][Improved file API]]
   1 [[P1076.LCS2016_006c][Improved directory API]]
   1 [[P1076.LCS2016_007a][Sequential deklarative regions - for if, case, loop statements]]
   1 [[P1076.LCS2016_014a][Allow Access Types to Protected Types and Composites of Protected Types]]
   1 [[P1076.LCS2016_015][Report Calling Path]]
   1 [[P1076.LCS2016_018][New attributes for scalar types]]
   1 [[P1076.LCS2016_018a][New attributes - ='index=]]
   1 [[P1076.LCS2016_018d][New attributes - ='designated_subtype=]]
   1 [[P1076.LCS2016_030][Garbage Collection]]
   1 [[P1076.LCS2016_041][Reflection API]]
   1 [[P1076.LCS2016_045a][Interface Construct and Port Mode Configurations]]
   1 [[P1076.LCS2016_045c][Interface Construct and Port Mode Configurations - ='converse=]]
   1 [[P1076.LCS2016_050][API for Assert]]
   1 [[P1076.LCS2016_059][Improved Type Generics]]
   1 [[P1076.LCS2016_059a][Ordering of any scalar array type]]
   1 [[P1076.LCS2016_070][Bidirectional Connections]]
   1 [[P1076.LCS2016_072b][Function Knows Vektor Size]]
   1 [[P1076.LCS2016_099][Extended Ranges]]
   1 [[P1076.LCS2016_I03][ISAC 03 - Signatures Required in Association Lists]]
   1 [[P1076.LCS2016_IEEEStdUpdates][Updating reference IEEE Standards]]

*Delayed*
   1 

*Rejected*
   1 


---++ My Private Pages
   * [[Main.PatrickLehmannReflection][Reflection for VHDL]] [[Main.PatrickLehmann][<br />]]


---++ My Personal Preferences

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UserForm
First Name	Patrick
Last Name	Lehmann
Titles
Email	Patrick.Lehmann@plc2NOSPAM.de
Telephone
Mobile
Skype ID	Paebbels
Department
Organization	PLC2 GmbH
URL	https://Paebbels.GitHub.io
Location	Freiburg
Region	Baden-Würtemberg
Country	Germany
Status Update
Topic revision: r9 - 2017-06-08 - 14:38:37 - PatrickLehmann
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