Hi,
Meeting Reminder:
Next Meeting of the VHDL study/working group meeting is
on Wednesday January 26 at 8 am Pacific.
Dial in 1-800-637-5822
Intl Access: +1 647-723-3937
Passcode: 6850837
This meeting is an official IEEE study/working group meeting
and is governed by the IEEE patent policy. Please read the
following before the meeting:
https://development.standards.ieee.org/myproject/Public/mytools/mob/slideset.pdf
Initial Agenda:
Review Meeting Minutes from Last Meeting
http://www.eda-twiki.org/vasg/meetings/2011_0110_meeting_minutes_unofficial.txt
Discuss WG P&Ps
As homework before the meeting, please review the IEEE WG P&Ps & suggest
customizations (where allowed) for our WG:
http://standards.ieee.org/about/sasb/audcom/wg_pp_0110.doc
You can also find this document by following the link from this page:
http://standards.ieee.org/about/sasb/audcom/bops.html
Initiate discussion of language change requirements
- it will expedite things if you come with a list
for discussion
Proposed Next Meeting Date: Thursday Feb 10 at 8 am Pacific
Best,
Jim Lewis
VHDL Study Group Chair
If you are reading this on the website and wish to receive these
via email, see the following link to sign-up for the reflector:
http://www.eda-twiki.org/vasg/index.html#Participation
-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787 Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Jan 24 20:17:11 2011
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