Subject: Re: [vhdl-200x] A 2nd proposal to boolean equivalence
From: Evan Lavelle (anti.spam1@dsl.pipex.com)
Date: Mon Dec 22 2003 - 03:19:54 PST
Tim Davis wrote:
> So, by extrapolation, I think what people might be looking for is a way
> to "overload" the if-then-else statement. (We have overloaded names,
> overloaded operators, overloaded functions, why not overloaded
> statements?) I suspect that might be a little tough to put together
> syntactically.
Overloading statements makes a language mutable, rather than just
extensible. In addition, VHDL is already notoriously difficult to write
compilers for; I suspect that making the basic statements themselves
dependent on context would make it very difficult.
> Unfortunately, VHDL makes this hard on us by requiring the selector
> expression to be static. Lets remove that requirement. While the use of
> case statements in place of if statements may seem unpalitable to some I
> would do it in a heartbeat. Absolutely no confusion over
> positive/negative logic would be a windfall.
I'm all in favour of generalising 'case', but it would have to done with
a new statement to make it backwards-compatible. non-Veriloggers should see
<http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf>
for a summary of the synthesis problems associated with more general
case statements. I also particularly like the 'e' 'boolean case'
statement, ie (although it doesn't address the boolean equivalence problem):
case {
boolean_expr { actions };
another_boolean_expr { actions };
default { actions };
};
> Second, lets add the boolean selector operator "?" which many languages
> have now and permit it to be overloaded.
It's interesting that not even C++ allows ?: to be overloaded, although
it does allow almost everything else (another 42 operators) to be
overloaded. I don't know why, but I suspect it's the mutability issue.
> Third, (as I proposed before) utilize enumerated type declarations with
> explicit type equivalency built into the declaration. Here is the syntax
> I proposed:
>
> type negative_logic is ('0' => true, '1'=>false, 'Z'=>false, 'X'=>false)
> with boolean,
> ('0'=>1, '1'=>0, 'Z'=>-1, 'X'=>-1)
> with integer,
> ('0' => "0", '1'=>"1", 'Z'=>"Z", 'X'
> => "X") with string;
If you want boolean equivalence, then it seems to me that this is a much
cleaner, simpler and better way of achieving it. However, the overall
effect is the same: the compiler is allowed to carry out implicit
typecasting without any explicit request (at the point at which it is
required) from the user.
Evan Lavelle
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