Subject: Re: [vhdl-200x] Corrections to Minutes for VHDL-200X-FT meeting, San Jose Dec 4, 2003
From: Hamish Moffatt (email@example.com)
Date: Fri Dec 19 2003 - 15:50:33 PST
Bailey, Stephen wrote:
> In summary, what is more important:
> 1. Decreased typing and
> 2. Ability to be consistent in the
> treatment of condition contexts between PSL and VHDL.
> Satisfying some group of people's subjective assessment that one form
> is inherently superior to the other in human detection of logic
Your #2 is based on the assumption that implicit boolean conversion is
appropriate in the PSL context, and therefore for consistency should be
allowed in all VHDL condition contexts. Why is implicit boolean
conversion appropriate in PSL though?
At a guess it would seem just to reduce typing again; thus everything
collapses to simply reduced typing. I don't find much merit in that
> I prefer tangible, objective benefits over subjective benefits,
> especially when they are optional as it satisfies the greatest number
> of people.
As do I. I feel that better compile-time checking is worth a bit more
> BTW, Happy Holidays to everyone!
Hear hear. At least we agree on something...
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