Subject: Fw: [vhdl-200x] CFA: Priorities
From: Stephen Bailey (Stephen.Bailey@synopsys.com)
Date: Tue Mar 11 2003 - 08:34:50 PST
(I sent this to Rick only as I missed that it also went to vhdl-200x. Rick, on
re-reading, I decided to add a bit more to make sure the context of my reply is
clear.)
> There are not any (details on the requests). You'll need to either be
comfortable fitting your priorities
> into an existing line item or state a new one. I've already added a few (new
requests to the priority SS based on priority feedback from WG members).
> However, my guidance is that if you think one of your priorities is closely
> related to an item, then add that as the priority and then work to make sure
> your specific requirements are accounted for.
>
> The priorities are general guidance. They do not replace the work of the
> functional teams to make sure they fully understand the request and take all
> requirements into consideration in developing a language change proposal. One
> line items are not fully documenting. That means the teams must do some
> requirements gathering/documenting/analysis prior to jumping into design work.
>
> -Steve Bailey
>
> ----- Original Message -----
> From: "Rick Munden" <munden@acuson.com>
> To: "Stephen Bailey" <Stephen.Bailey@synopsys.COM>
> Cc: <vhdl-200x@eda.org>
> Sent: Tuesday, March 11, 2003 8:41 AM
> Subject: Re: [vhdl-200x] CFA: Priorities
>
>
> > Steve,
> >
> > As you said yourself at the DVCon meeting, it is vewry difficult to
> > discuss these issues based on one line descriptions. Where can I find
> > the detailed explanations of each proposal?
> >
> > Thanks,
> > Rick Munden
> >
> >
> > Stephen Bailey wrote:
> > > Attached is an update on the current priorities list. Today (10 Mar 03)
was
> the
> > > suspense date for collecting this information. However, if you have not
had
> an
> > > opportunity to provide this data to me yet, please do so ASAP. I will
> continue
> > > to collect the information through thursday night for presentation to the
> VHDL
> > > 200x Steering Committee (all technical team leaders and myself) on Friday.
> > >
> > > NOTE: In addition to updating the priorities based on additional inputs,
I
> have
> > > sorted the data to make it easier to identify the top priorities as
> expressed by
> > > the membership of this WG.
> > >
> > > If you are new to the group and have not seen the presentation which
> contains
> > > the base list of requests for language enhancements, please send me an
email
> and
> > > I will send you that presentation.
> > >
> > > -----------------------------------------------------------------
> > > Stephen Bailey
> > > Staff Corporate Applications Engineer, VHDL Simulation
> > > Synopsys Inc.
> > > sbailey@synopsys.com
> > > 303-775-1655 (voice/mobile)
> > > 650-584-4893 (corporate voice mail)
> > > Read Verification Avenue:
> > > http://www.synopsys.com/va
> > > -----------------------------------------------------------------
> >
> >
>
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