Re: [vhdl-200x] CFA: Priorities

Subject: Re: [vhdl-200x] CFA: Priorities
From: Stephen Bailey (
Date: Tue Mar 11 2003 - 08:29:38 PST

Hi Evan,

Not to worry about the current sorting. This is just a "dumb" Excel
auto-sorting. For assertions, I agree that it is very difficult to separate the
various categories as they are all very closely related. Some people want to
emphasize temporality, some want to emphasize compliance/consistency to
Accellera's PSL. At this level, it is probably too much information as far as
setting priorities. This is an unfortunate side-effect of not wanting to drop
any request as certain requirements are inherent in it. It will be up to the
functional team to consider all of these requirements related to assertions in
formulating the proposed language change.

I'll review the priorities again later this week and add some intelligence to
the sorting. We don't want "vote splitting" to hide the true priority.

As far as what I personally intended with my vote on assertions is that we
should leverage the work of Accellera in adding the temporal
expression/assertion capabilities to VHDL. There's no reason for us to
re-invent this particular wheel. We just need to adjust it to integrate it well
with VHDL (do we need unique constructs for combinatorial and temporal
assertions?). To the extent that the same underlying constraint and assertion
evaluation engines can be used for VHDL, SystemVerilog and other languages the
faster and more complete the support will be available in VHDL tools.

It is definitely the case that all the assertion requests revolve around
temporal assertions and assertion-based verification.

I have read Erich's and Gabe's replies and I think you'll see there is a common
thread to the replies. Specifically, all assume temporality and integration of
the capability into VHDL. The details are TBD by the functional team.

(BTW: Item 27 in rev2 of the priorities is "Apply Accellera Assertions" and not
Sugar. Sugar is IBM's assertion language. Sugar may have been the starting
point for the Accellera work, but it is not the ending point. The distinction
is an important one.)

-Steve Bailey

----- Original Message -----
From: "Evan Lavelle" <>
To: "VHDL-200x" <>
Sent: Tuesday, March 11, 2003 2:35 AM
Subject: Re: [vhdl-200x] CFA: Priorities

> Steve - I see that you've got 'Assertions' as No.8 on the list, with 7
> votes, and 'Apply Accellera assertions' as No.27, with only 3 votes. I
> personally voted for 'temporal assertions', and this has actually
> appeared as a vote for general assertions, ie. 8 rather than 27. This is
> presumably because you wrote on March 1st:
> > Finally, I want to point out that I categorized all "temporal assertions"
> > priorities as a priority for the general Assertion category. The reason
> > that VHDL already has combinatorial (or monotonic) assertions. If anyone
> > that I have wrongly jumped to this conclusion on their behalf, please let me
> > know.
> I think there may be some disagreement on the classification of
> 'temporal assertions'. I personally use the phrase to mean the ability
> to define temporal relationships between specific boolean conditions,
> and the ability to test the truth or otherwise of those relationships.
> This is what Sugar and temporal-e do, so it seems to me that a vote for
> 'temporal assertions' is actually a vote to add the functionality of
> Sugar (ie. 'Apply Accellera assertions'), temporal-e, or something
> similar to VHDL.
> This is an important distinction because No.27 - adding Sugar to the
> language - is going to be such a vast amount of work that having only 3
> votes could kill it. However, is it actually the case that it
> effectively got 10 votes, which would put it pretty much at the top of
> the priority list? Would anyone else who voted for 'assertions'
> (Moretti, Lewis, Bailey, Hsu, Martinolle, Anderson) like to comment?
> Evan

This archive was generated by hypermail 2b28 : Tue Mar 11 2003 - 08:34:01 PST