SummaryOfStill-openIssuesAndOwnersAsOfMid-June2016 < P1800

P1800 Web>SystemVerilogAssertionCommittee>SummaryOfStill-openIssuesAndOwnersAsOfMid-June2016 (2016-06-20, ErikSeligman) (raw view)EditAttach
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Mehbub Ali (Intel)

2367: Clarification: sampled-value functions are unaffected by disable-iff

3928: Fix text in LRM encouraging incorrect coding of "clk iff enable"

3935: rewriting algorithm

Ang Boon Chong (Intel)

2825: 16.16 Disable iff: checkers not included in list of default extensions

2939: Hierarchical reference of checker variable should be disallowed completely

4173: 16.12, 17.3 clarify that range is bounded by constant expression

Shalom Bresticker (Accellera)

4020: Syntax description of properties in inconsistent

4154: Errata in section 17, checker

4557: Typos in clause 16

4881: Typesetting of sequence methods triggered and matched is inconsistent

5231: Assertion system tasks are not well-defined for assertions in packages

5302: In some definition of module_or_generate_item_declaration there is lack of default disable

5438: TYPO: Example has reference to an undeclared variable + missing ()

Eduard Cerny (Synopsys)

2546: empty match' and 'vacuous success' are not clearly defined in LRM

3147: Rule c) in 16.17 conflicts with the relaxed rules on clocking of assertions with inferred leading clocking

3217: Definition for referring to an assertion as a relative hierarchical name is missing in Section 23.6

Ben Cohen (Accellera)

3552: 16.14.6 Sequence methods // .triggered need further clarification

4037: Define false vacuity and contributions to pass/fail counters in simulation

4183: Returned value of sampled value functions should well-defined

Dmitry Korchemny (Synopsys - Chair)

3559: Implication example explanation is not accurate

4724: Checkers should be mentioned in the description of Reactive region

5510: Definition of sequential property is awkward

5548: Non-degeneracy: limitations and references

Manisha Kulshrestha (Mentor Graphics)

2858: Clarify the rules for assigning a value to a non-checker variable from within a checker

2947: Module variables from within function or task not sampled, LRM and practice contradictory

5194: $inferred_clock description should mention checkers and allowed types for $inferred_clock

Anupam Prabhakar (Mentor Graphics)

2555: Clarify relationships of different local variable binding mechanisms

2842: Checker variable randomization with deferred assumptions is not defined

3614: Free variable randomization with assumptions with various clock domains

Erik Seligman (Intel – Co-chair)

3610: Sequence methods with sequences admitting empty match

3924: Need to clarify behavior when sequence event used as property clocking

Samik Sengupta (Synopsys)

2340: clarifications needed on vpi_control for non-temporal and immediate assertions

2384 (reject?): Rules about sampling for clocking block variables referenced in concurrent assertions are not clear

2980 semantic inconsistency between expect and procedural concurrent assertions         open

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Topic revision: r1 - 2016-06-20 - 15:43:15 - ErikSeligman
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