SV-ACMinutes2011_01_11 < P1800

P1800 Web>SystemVerilogAssertionCommittee>SVACMeetingMinutes>SV-ACMinutes2011_01_11 (2011-01-24, ErikSeligman) (raw view)EditAttach
Agenda:

-------

- Reminder of IEEE patent policy.

See: http://standards.ieee.org/board/pat/pat-slideset.ppt

- Minutes approval

- F2F

- Email ballot results

- New issues

- Issue resolution/discussion

    2271: sequence events require a clocked sequence

    2557: Rules for passing automatic variables to sequence subroutines are

        not clear

         - Erik to modify the proposal and to remove the reference.

    2804: Need to clarify rule (b) in 16.15.6 to allow inferred clock when

        expression appears in procedural assertion

    3113: Add port_identifier to constant_primary BNF for sequences,

        properties and checkers

    2476: Need clarification about system functions $onehot, etc

- Enhancement progress update

    3036: Explicitly allow unpacked data types for arguments of assertion

        system functions

    3037: Introduce assertion system functions for 4-valued type support

- Opens

Attendance Record:

------------------

         Legend:

                 x = attended

                 - = missed

                 r = represented

                 . = not yet a member

                 v = valid voter (2 out of last 3 or 3/4 overall)

                 n = not a valid voter

                 t = chair eligible to vote only to make or break a tie

Attendance re-initialized on 2010-07-06:

  v[xxx-xxxxxxxxx-x-xxxxx--xxx] Laurence Bisht (Intel)

  v[xxxxxxxxxxx-xxxxxxxxxxxxx-] Eduard Cerny (Synopsys)

  v[xx--x-xxxxxxx-xxxxx-xxxxxx] Ben Cohen

  n[-------xx-x-xxx-x--xxxxxxx] Surrendra Dudani (Synopsys)

  y[-x-x-x--xx---xxxx---x-xxxx] Dana Fisman (Synopsys)

  n[-----xxxxx-xxxx-x-xxxxxxxx] John Havlicek (Freescale)

  v[xxxxxxxxx-xxx-xxxxxxxxxxxx] Tapan Kapoor (Cadence)

  t[xxxxxxxxx--xxxxxxxxxxxxxxx] Dmitry Korchemny (Intel ¿ Chair)

  v[xxxxxxxxx--xxxxxx-xxxxxxxx] Scott Little (Freescale)

  v[xxxxxxxx-xxxxxxxxx-xxxxxxx] Manisha Kulshrestha (Mentor Graphics)

  v[xxxxxx-xxxxxxxxxxxxxxxxxxx] Anupam Prabhakar (Mentor Graphics)

  n[--x-xx-xxx-xx--xxxxxxx-xxx] Erik Seligman (Intel)

  v[xxxx-xxxx--xxxxxx-xxxxxxx.] Samik Sengupta (Synopsys)

  v[xxxxxxxx-xxxxxxxxxxxxx-xxx] Tom Thatcher (Oracle ¿ Co-Chair)

  n[----x.....................] Srini Venkataramanan (?)

    |- attendance on 2011-01-11

  |--- voting eligibility on 2011-01-11

Minutes:

--------

- Reminder of IEEE patent policy.

See: http://standards.ieee.org/board/pat/pat-slideset.ppt

     Participants were reminded of the policy.

- Minutes approval

Ben: Move to approve minutes from last meeting

Scott:     Second

     Vote results: 7y, 0n, 0a

- Issue resolution/discussion

    2271: sequence events require a clocked sequence

Manisha: The added sentence in the proposal should belong to an existing

     paragraph. Probably the last paragraph in the section would be best.

Anupam:    In proposal, for 2412, default clocking is clarified. default clock

     may apply.

Manisha:   Don't think that will apply here.

(Laurence joined)

Manisha:   Default clocking applies to assertions, does not apply to

     events.

Anupam:    It would make things consistent. Why would events be treated

     differently?

Dmitry:    What happens if instantiated in always block. Can inferred clock

     apply?

Anupam: Sequence event or sequence method should behave the same.

(Tapan joined)

Tom: Can't infer clock from always block. The rules state that only a

     single event control is allowed. A second event control with the

     sequence event would violate the rules, and no clock could be

     inferred.

Anupam: You would use wait for sequence method, @s for sequence.

Ed: In section 9.4.3 Level sensitive event control.

     Wait is level sensitive.

Dmitry: So only option for inferring a clock is default clock.

Manisha: @sequence can occur inside an action block as well.

Tom: One possible wording: "If there is no default clocking, then the

     sequence must be explicitly clocked.

Manisha: Instead, just refer to section where clock inference rules are

     defined.

Face-to-face meeting:

Dmitry: It would be useful to hold a face-to-face meeting

     Hold it the week of DVCon. Thursday & Friday, March 3, 4.

Ed:  For traveling, wouldn't Wednesday, Thursday be better.

Dmitry:    There are technical sessions on Wednesday. If people don't have

     conflicts, that will work.

Dmitry: Will send an e-mail. To see which option (Wed, Thu, or Thu, Fri)

    is preferred.

     Plan for now: Wed, Thu, March 2, 3

Dmitry:    Will talk about location/host next week.

- Issue resolution/discussion

Champions Feedback

3113

Laurence:  Has talked to Shalom. Needs to gather more feedback.

Dmitry:          Looks like we should implement Shalom's suggestion.

Manisha:   Type checking has to occur, even if port is constant primary.

           Type checking has to be repeated after substitution.

- Enhancement Progress Update

    3036: Explicitly allow unpacked data types for arguments of assertion

        system functions

    3037: Introduce assertion system functions for 4-valued type support

Dmitry: Preliminary proposals have been uploaded

    3036:

Manisha: Checked with Gordon, and he said it should be OK to define

arguments

     as bit-stream types. Cast expression to dynamic array.

Dmitry:    Example: $onehot(unpacked_array)

Anupam:    May need a statement that this can only be used outside assertions.

     because these types are not allowed inside assertions.

     So if you have if($onehot(unpacked_array)) that should be OK, but

     assert property ($onehot(unpacked_array)) would not be legal

Dmitry:    Will modify proposal and we will discuss next time.

    3037:

Dmitry:    Updated proposal to reflect Anupam's suggestion (single count

function)

Anupam:    If you are also defining $countzeros, should you just have four

     functions $countones, $countzeros, $countX, and $countZ?

Ed:  Don't really need $countzeros

Anupam:    String is a dynamic type. Would this be inefficient?

Tom: String literal would be fine.

Ed:  Could be a vector, with only last 4 bits used. (rightmost 4 bits?)

Ben: Why should it be a variable?

Manisha: Anywhere you can use a variable, you can use a literal.

Laurence: Would change in second argument also cause evaluation of an

     expression containing this function?

Dmitry:    If we had $countbits(exp, 'bz), would we count z, x, and 0?

Dmitry:    Will update proposal

Meeting Adjourned
Topic revision: r2 - 2011-01-24 - 16:18:35 - ErikSeligman
P1800