SV-ACMinutes2010_09_28 < P1800

P1800 Web>SystemVerilogAssertionCommittee>SVACMeetingMinutes>SV-ACMinutes2010_09_28 (2010-10-01, ErikSeligman) (raw view)EditAttach
Date: 2010-09-28

Time: 16:00 UTC (9:00 PDT)

Duration: 1.5 hours

Dial-in information:

--------------------

Meeting ID:            38198

Phone Number(s):

1-888-813-5316         Toll Free within North America

Live Meeting: [[https://webjoin.intel.com/?passcode=3050034]]

Agenda:

-------

- Reminder of IEEE patent policy.

See: http://standards.ieee.org/board/pat/pat-slideset.ppt

- Minutes approval

- F2F meeting (discussion)

- Email ballot results

- New issues

3213: Update definition of sampled value

- Enhancement progress update

- Issue resolution/discussion

3008: In $past BNF, "expression" should be "expression1"

1853: BNF for calls to $rose and other sample value system functions.

2904: Clarify when disable iff condition must occur relative to starting

and ending of an attempt

3134: sequence and property range parameters are erroneously defined

3135: Verbal explanation of nexttime and always is misleading for

multiple clocks

1678: Clarify that rewriting algorithm doesn't replace name resolution

2571: confusing assertion clock inference rule

2386: Rename 16.9 to "Local variables"?

3117: make it clear that rewriting algorithm (F.4.1) applies to checker

and let

- Opens

Attendance Record:

------------------

         Legend:

                 x = attended

                 - = missed

                 r = represented

                 . = not yet a member

                 v = valid voter (2 out of last 3 or 3/4 overall)

                 n = not a valid voter

                 t = chair eligible to vote only to make or break a tie

Attendance re-initialized on 2010-07-06:

  n[-x-xxxxx--xxx] Laurence Bisht (Intel)

  v[xxxxxxxxxxxx-] Eduard Cerny (Synopsys)

  v[-xxxxx-xxxxxx] Ben Cohen

  v[xx-x--xxxxxxx] Surrendra Dudani (Synopsys)

  v[xxxx---x-xxxx] Dana Fisman (Synopsys)

  v[xx-x-xxxxxxxx] John Havlicek (Freescale)

  v[-xxxxxxxxxxxx] Tapan Kapoor (Cadence)

  t[xxxxxxxxxxxxx] Dmitry Korchemny (Intel ¿ Chair)

  v[xxxx-xxxxxxxx] Scott Little (Freescale)

  v[xxxxx-xxxxxxx] Manisha Kulshrestha (Mentor Graphics)

  v[xxxxxxxxxxxxx] Anupam Prabhakar (Mentor Graphics)

  v[--xxxxxxx-xxx] Erik Seligman (Intel)

  v[xxxx-xxxxxxx.] Samik Sengupta (Synopsys)

  v[xxxxxxxxx-xxx] Tom Thatcher (Oracle ¿ Co-Chair)

    |- attendance on 2010-09-28

  |--- voting eligibility on 2010-09-28

Minutes:

--------

- Reminder of IEEE patent policy.

See: http://standards.ieee.org/board/pat/pat-slideset.ppt

Participants were reminded of the policy.

- Minutes approval

E-mail from Ben: One more thing: On Checker outputs, we agreed that

     type wire is not allowed in checkers, both in ports and in the

     checker_or_generate_item_declaration.

Scott: Move to approve minutes

Samik: Second

     Vote results: 9y, 0n, 0a

- F2F meeting (discussion)

E-mail poll: Most people favored moving face-to-face meeting to the DVCon

     time frame. Dmitry suggested March 5,6

     We'll hold face-to-face at that time.

- New issues

3213: Update definition of sampled value

Dmitry: New Mantis item follows from our discussion of checker

enhancements.

- Enhancement progress update

 1. Real values in concurrent assertions:

     Mantis item is 2328

     Ed had commented on proposal, Scott had addressed his comments.

     Samik had no comments.

     Ready for e-mail vote.

 2. Output arguments of checkers

    Still in progress.

     Dmitry: depends on continuous assignments.

     Anupam: Will get time to work on it this next week.

 3. Allow procedural control statements in checkers

     Dmitry: have not started on proposal

 4. Checker sampling

    in progress

- Issue resolution/discussion

2904

Anupam: Had proposed wording in an e-mail:

    "If the disable condition is true at the point of starting a new

    evaluation attempt, that attempt shall not start and the property is

    considered to have a disabled evaluation for this time."

John: How is this different from existing wording?

Manisha: If triggered is within disable iff, and triggered expression is on

     a different clock, then we would have to wait to the end of Observed

     region to determine if property passes. That is because the property

     evaluation could complete first, and the triggered expression would

     be calculated after.

Manisha: If triggered expression in disable iff is on the same clock, as

     the property, we propbably could ensure that the triggered evaluates

     before the property.

     However, for different clocks, we don't want to require an event

     ordering.

Ed:  Samik had proposed text " . . . end of the evaluation attempt".

Samik: Would change sentence in proposal from "the end of the observed

region

     of the time step in which the attempt ends" to

     "the end of the assertion attempt"

Dmitry:    If proposal is updated, is it ready to vote?

Scott:     Question: Triggered condition happens in Observed Region.

     Any other item which would change in Observed Region?

Manisha: Clocking block variables

Scott:     Interested in preserving consistency across simulators

Ed:  There's an asymmetry between start of attempt and end of attempt.

John: Triggers persist throughout time step

Ed:  Proposed text "between start of attempt and end of attempt"

John: Original concern: what about glitch in Active region?

     Would that disable an assertion attempt which would have started

     in Observed? Wanted more precise language.

Anupam: English question: Does "between" imply that endpoints of interval

     are included?

John: Can add "inclusive" at the end of the sentence to make it clear.

Dmitry:    Will call for e-mail vote when proposal is updated.

3134:

Ed:  Change "next clock ticks" to "clock ticks"

Dmitry:    Agree

Dmitry:    Added text should be colored blue.

Dmitry: When proposal is updated, will call for an e-mail vote.

3135:

Dana: Explanation of next-time operators are accurate for single clock

     cases, but not for multiple clock cases. New paragraphs explain

     what occurs in this case.

Ed:  Change "formula' to "property expression"

Ed:  N+1 ticks: Which clock is used?

Dana: Either case is OK.

Ed:  OK right.

Dana:  "formula" in replacing text refers to entire property, not just

     the property expression argument to nexttime: how to express this?

Dmitry:    Use "property"

Dmitry:    Make inserted text blue. Othere font problems

Tom: 3134 and 3135 insert paragraphs in the same location: Which

     paragraph goes first?

Dana: Text added by 3134 will be added first, Text added by 3135 will go

     after text added by 3134

Dmitry: Add a note to editor to make this clear.

Dmitry:    Will call for e-mail vote when proposal is updated.

1678:

Scott:     1800-2009 already renamed the section.  However, 16.8.2 introduces

     local variable arguments to sequences before local variables are

     defined. Didn't make sense to move either section, so just added

     a note to the beginning of 16.8.2 to refer to the local variables

     section.

Dmitry:    Will call for an e-mail vote.

Meeting Adjourned.
Topic revision: r1 - 2010-10-01 - 20:21:53 - ErikSeligman
P1800