WGMmSept2209 < P10761

P10761 Web>WGMeetingMinutes>WGMmSept2209 (2016-01-22, ErnstChristen) (raw view)EditAttach
---++ IEEE P1076.1 Working Group !F2F & Telco Meeting Minutes - September 22, 2009 10am PDT (17:00 GMT)

*Status:* approved by WG on 20 October 2009.

%TOC%
---+++ Attendees
   * Ken Bakalar *
   * Ernst Christen (chair, meeting convener) *
   * Joachim Haase
   * Ewald Hessel
   * Jademerald (anonymous) *
   * Tom Kazmierski
   * Rami Khouri
   * Torsten Maehne
   * Benjamin Nicolle
   * Alain Vachoux (note taker)

*: phone participation.

---+++ Agenda
   * Call to order
   * Approval of agenda
   * Administrative issues
      * Minutes of last meeting
      * Revision of IEEE Std 1076.1.1: Current status
      * Review of IEEE patent policy
   * Detailed review of new projects for revision of IEEE Std 1076.1
      * Spice interoperability
      * Frequency domain modeling
   * Next meeting
   * AOB
   * Adjourn
---+++ 1. Call to order on September 22, 2009 at 10:05 PDT

Ernst welcomed the participants and started presenting the [[%ATTACHURL%/090922_mtg_slides.pdf][meeting slides]].

---+++ 2. Approval of Agenda

Agenda unanimously approved.

---+++ 3. Administrative Issues

Motion from Ken to approve the minutes of the August 18 meeting. Alain seconded. Minutes unanimously approved without modifications.

Ernst informed that the PAR for IEEE Std 1076.1.1 has been approved bay DASC on August 20 and that he has been then submitted to IEEE !NesCom for its October 23 meeting. The ballot process should be straightforward, so the new revision of the standard should be ready for the IEEE !RevCom meeting in March 2010. Peter Ashenden agreed to do the required editorial work on the 1076.1.1 LRM.
---+++ 4. Detailed Review of New Projects for Revision of IEEE Std 1076.1

Ernst passed the word to Joachim to present his slides on Spice interoperability and frequency-domain modeling.
---++++ 4.1. Spice Interoperability

[[%PUBURL%/P10761/WorkingGroupDocuments/slides_IEEE1076.1-WG_09.2009_spice_vhdl-ams.pdf][Slides]]

Summary of the discussion:

[Ernst] Should the interaction with the VHDL-AMS simulator be handled by the tool or should it be a property of the VHDL-AMS model?<br />[Joachim] Considering the example of the temperature, its value in the model must be the same as the value set in the tool.<br />[Ken] (slide #5) What does "identification of terminals" mean?<br />[Joachim] It concerns global nodes such as VDD or ground. Identification means naming of such nodes. Maybe they could be declared in a package.<br />[Ernst] What are the issues to work on in the WG regarding Spice interoperability?<br />[Ken] Are there new requirements on the VHDL-AMS language to support Spice models?<br />[Joachim] No specific requirements. Existing VHDL-AMS language is usable as is.<br />[Ken] There is no chance that VHDL-AMS models of transistors can compete with highly optimized tool hardcoded models when simulating complete circuits.<br />[Joachim] Agree. The approach is only for single transistor models.<br />[Ken] VHDL-AMS architecture bodies are not needed.<br />[Ken] (slide #9) Why not using a configuration instead of a constant?<br />[Ernst] Model cards must be usually applied to several instances, so using a constant is easier and more efficient.<br />[Ken] Is a configuration specification unusable?<br />[Ernst] It is usable for pure VHDL-AMS models, but it becomes an issue when considering mixing Spice netlists in VHDL-AMS models.<br />[Joachim] (slide #13) There is a problem with the specification of the bulk terminal (3-terminal vs. 4-terminal transistor).<br />[Ernst] This is an issue if models are only VHDL-AMS (unassociated terminals).<br />[Ken] Wondering if the access to simulator variables is a good or a bad thing.<br />[Ernst] There are actually many open issues in using Spice models.<br />[Ken] (slide #17) Is the goal to interface with any kind of Spice netlist or subcircuit?<br />[Ernst] It should rather be a set of VHDL-AMS declarations of Spice primitives that can be used in VHDL-AMS models, but with Spice implementations behind.<br />[Ken] (slide #19) The mapping is only one to one.<br />[Joachim] The problem is how to define the mapping. <br />[Ernst] (slide #20) Recommended Practices are handled differently by the IEEE than other standards, and that AFAIK the two cannot be mixed. This means that recommended practices could very well be in the scope of the WG, but likely would require a different standard.<br />[Joachim] It is important to have the same usage in different tools.<br />[Alain] There are three main issues: 1) Modeling Spice primitives in VHDL-AMS (entities + architectures), 2) Interfacing with Spice implementations (VHDL-AMS entities only), and 3) Mixing Spice netlists/subcircuits in VHDL-AMS models. <br />[Ernst] There will be a WG discussion on that, and a WG vote to decide on priorities. Also, a champion must exist for each discussed topic. Part of Joachim's presentation could lead to language design issues, but we are not concerned with tool issues.
---++++ 4.2. Frequency-Domain Modeling

[[%PUBURL%/P10761/WorkingGroupDocuments/slides_IEEE1076.1-WG_09_2009_frequency_domain.pdf][Slides]]

Summary of the discussion:

[Joachim] The main issue is that the FREQUENCY function may be only called in a spectral source quantity declaration.<br />[Ken] (slide "Fundamental Example") What are "Y"s? The declaration of Y is missing.<br />[Joachim] Y is a frequency-dependent constant.<br />[Ernst] The code in the green box is not real VHDL-AMS code. It only shows the intent.<br />[Joachim] The example shows the use of the FREQUENCY function in a simultaneous statement.<br />[Ernst] FREQUENCY should not be called if DOMAIN = TIME_DOMAIN.<br />[Alain] Concerned with the consistency between time-domain and frequency-domain descriptions.<br />[Ernst] Not a new issue. Must be the responsability of model writer. One issue with the fundamental example is that a complex typed object is depending on frequency.<br />[Torsten] (slides "S11 - Parameter Description (1/2)")The code should be encapsulated in an "if DOMAIN = FREQUENCY_DOMAIN" branch.<br />[Joachim] The assertion checks if we are not doing time-domain simulation. It fails if this is not true.<br />[Ernst] The current VHDL-AMS language definition is clear about the use of the function FREQUENCY and the modeling intent is clear.<br />[Alain] Not sure that the current VHDL-AMS LRM is clear about the use of the function FREQUENCY in simultaneous statements.<br />[Ernst] Need to see how the current language definitions must be extended. The showed example uses some workaround, but is it representative enough of the general case?

Discussion stopped because we arrived close to the end of the alloted time.
---+++ 5. Next Meeting

The next meeting will be a telco on October 20, 2009 at 8am PDT. Details will follow.
---+++ 6. AOB

None.

---+++ 7. Adjourn

Ernst adjourned the meeting at 12:00 PDT.
Attachments
I	Attachment	Action	Size	Date	Who	Comment
pdf	090922_mtg_slides.pdf	manage	222.8 K	2009-09-28 - 15:39	AlainVachoux
Topic revision: r8 - 2016-01-22 - 01:40:57 - ErnstChristen
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