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<!-- * Set ALLOWTOPICCHANGE = P1076AdminGroup --> ---+ P1076 November 10, 2011 Meeting Minutes ---++ Attendees: * Main.JimLewis * Main.JarekKaczynski * Main.DavidBishop * Main.RyanHinton * Main.HansTiggeler * Main.PeterFlake ---++ Agenda: * Approve [[http://www.eda.org/twiki/bin/view.cgi/P1076/MeetingOctober13][October 13 Minutes]] * Motion main.DavidBishop * 2nd: main.PeterFlake * Review updates to Functional Coverage Proposal (Jim Lewis) * Review updates to DPI Proposal (Peter Flake) * [[http://www.eda.org/twiki/bin/view.cgi/P1076/MeetingWhiteboard][See Whiteboard for additional items]] ---++ Discussion ---+++ DPI- Peter Flake * Support the Accellera SCE_MI interface to hardware emulators. * VHDL to C calls seem straight forward * C to VHDL may be challenging. * Easiest approach would be to limit C to calling only items in VHDL packages. * Is this a reasonable restriction? ---+++ Functional Coverage Updates - Jim Lewis * The Functional Coverage data structure now supports coverage goals and weights * It includes methods that return number of holes, return is covered (true if holes = 0), return the nth hole, randomly selects one of the holes and returns that. * Updated documentation is now available through the links. ---+++ Left Over Items from Accellera * Interfaces<br /> * FT-17-1: Interfaces for tb * FT-17-3: Interfaces for RTL * N-010-1: -- David to further research this. * ?abs and add sign bit with type conversion built in? * From the old numeric packges page: * 1) Add functions "add_sign" and "remove_sign" to convert between SIGNED and UNSIGNED types. "add_sign" would add a '0' sign bit and increase the vector by 1 bit. "remove_sign" would do an "abs" and remove the sign bit, shrinking the vector by 1 bit. * Functional Coverage - Jim to incorporate this into FC proposal requirements<br /> * SAB-5 * Randomization Issues - Jim to incorporate this into randomization requirements * SAB-3, * SAB-4 * TBV-13 * TBV-16 * Data Structures: - Need to start a data structure requirements either single or combined. * TBV-10: Associative Arrays * TBV-17: Memories (loading and dumping memories) ---+++ Old Items from VHDL-200X TBV * TBV4: Queues/FIFOS - in order Scoreboard * TBV2: Associative Arrays - Out of order scoreboards * Keys * Dynamically Add * Dynamically Remove * constant time access - efficiency - hash table of keys - use a pointer * TBV3: Fork and Join - already on list and assigned to Peter Flake * Dynamic Processes - Dynamic connect and disconnect of signals? * Need use cases. ---++ Action Items: * Jim: Add a meeting Intent to attend so we can get a feeling for who may attend. ---++ Next Meeting Dates: Thursday December 1, 8 am Pacific Thursday December 15, 8 am Pacific
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Topic revision: r1 - 2020-02-17 - 15:36:21 -
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