(r4) LCS2016_PSLb < P1076

P1076 Web>VHDL2017>LCS2016_PSLb (revision 4) (raw view)~~EditAttach~~
---+ Language Change Specification for PSL Harmonization

---++ 

 | <sticky><b>LCS Number:</b></sticky> | LCS-2016-PSL |
 | <sticky><b>Version:</b>   </sticky> | 1 {30-Jan-2017} |
 | <sticky><b>Date:</b>      </sticky> | 30-Jan-2017 |
 | <sticky><b>Status:</b>    </sticky> | Draft |
 | <sticky><b>Author:</b>    </sticky> | Jim Lewis |
 | <sticky><b>Email:</b>     </sticky> | [[Main.JimLewis]] |
 | <sticky><b>Source Doc:</b></sticky> | [[PslHarmonization][PSL Harmonization]] |
 | <sticky><b>Summary:</b>   </sticky> |  |

---+++ Voting Results: Cast your votes here

Yes:
   1 %USERSIG{JimLewis - 2017-01-30}% ver 1
   1 %USERSIG{PatrickLehmann - 2017-03-14}% ver 1
   1 %USERSIG{FarrellOstler - 2017-03-21}% ver 1
No:

Abstain:
   1 %USERSIG{BrentHahoe - 2017-02-16}% Version 1 - Abstain due to lack of personal time for review.
   1 %USERSIG{MartinThompson- 2017-02-17}% Version 2 - no use of PSL

---++ Reviewing Notes
Updates to references of 1850-2005 to 1850-2010

---++ Style Notes
<noautolink><sticky>
Changes are shown in %RED%red font%ENDCOLOR%.  
Deletions are %RED%<del>crossed out</del>%ENDCOLOR%. 
Editing notes in %GREEN%green font%ENDCOLOR%. 
 

---++ Details of Language Change

---+++ Replace all usage of 1850-2005 with 1850-2010
---++++ 1.3.5 Incorporation of Property Specification Language
---+++++ Page 3 and 4, last paragraph on page 3 and First paragraph of page 4:
<font color="green">[Edit Note:  the "TM" and the number "2" following the . and in the foot note should be superscript</font>]

VHDL incorporates the simple subset of the Property Specification Language (PSL) 
as an embedded language for formal specification of the behavior of a VHDL description. 
PSL is defined by IEEE Std 1850TM -20<font color="red">10<strike> 05</strike></font>.2 
All PSL constructs that appear in a VHDL description shall conform to the
VHDL flavor of PSL. Within this standard, reference is made to syntactic rules of PSL. 
Each such reference has the italicized prefix PSL_ and corresponds to the 
syntax rule in IEEE Std 1850-20<font color="red">10<strike> 05</strike></font> with the same name
but without the prefix.

FootNote:
---------
2 Information on references can be found in Clause 2.


---++++ 6.1 General (Declarations)
---+++++ Page 64, 3rd paragraph
PSL verification units and declarations are described in 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>. 
It is an error if a property defined by a PSL property declaration 
does not conform to the rules for the simple subset of PSL.

---++++ 6.11 PSL clock declarations
---+++++ Page 94, Note on bottom of page
NOTE-A PSL clock declaration differs from other declarations in 
VHDL and PSL in that it does not declare a designator
denoting some entity. It is more akin to a VHDL specification in 
that it associates additional information with PSL
directives within a design. Hence, it is not listed as a declaration 
in 6.1. Since it is called a declaration in 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>, 
it is included in this clause for ease of reference, 
rather than in Clause 7.

---++++ 7.3.4 Verification unit binding indication
---+++++ Page 103, 3rd and 4th paragraph of section counting BNF as 1 paragraph
Each name in a verification unit list shall denote a PSL verification 
unit (see 13.1 and IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>).

It is an error if a PSL verification unit bound to a design
entity by a configuration specification, whether
explicit or implicit, is explicitly bound by its declaration 
(see IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>). 
It is an error if a verification unit binding indication is 
specified for a component instance that is unbound or 
that is bound by a binding indication that has an entity 
aspect of the third form (open).

---++++ 12.3 Visibility
---+++++ Page 190, Edit Note 5 (near bottom of page before examples)
NOTE 5-The visibility of declarations within a PSL verification unit 
is defined in IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>.


---++++ 13.1 Design units
---+++++ Page 195, Last paragraph before 13.2
Entity declarations, architecture bodies, and configuration 
declarations are discussed in Clause 3. Package
declarations, package bodies, and package instantiations 
are discussed in Clause 4. 
Context declarations are discussed in 13.3. 
PSL verification units are described in IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>.


---++++ 14.2 Elaboration of a design hierarchy
---+++++ Page 200, 7th paragraph counting the list as 1 paragraph
For a block statement implied by a design entity, whether the 
design entity at the root of the design hierarchy
or a design entity bound to a component instance, to which 
one or more PSL verification units are bound,
after elaboration of the implied block statement, each PSL 
verification unit bound to the design entity is
elaborated. Elaboration of a PSL verification unit involves 
first elaborating each not-yet-elaborated package
primary unit or package instantiation primary unit 
containing declarations referenced by the PSL
verification unit. Further interpretation of the PSL verification 
unit is defined in IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>.

---++++ 14.4.2.1 General
---+++++ Page 206, 3rd and last paragraph of this section
Rules for creation of PSL declarations are defined in 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>.

---++++ 14.5.1 General (Elaboration of a statement part)
---+++++ Page 210, last paragraph of this section (just before 14.5.2)
Rules for interpretation of PSL directives are defined in 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>.

---++++ 14.7.5.2 Initialization
---+++++ Page 221, Item d) of the list
d) Any action required to give effect to a PSL directive is 
performed (see IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>).

---++++ 14.7.5.3 Simulation cycle
---+++++ Page 222, Item e) of the list
e) Any action required to give effect to a PSL directive is 
performed (see IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>).

---++++ 15.2 Character set
---+++++ Page 226, 2nd paragraph (immediately after table)
Within a PSL declaration, a PSL directive, or a PSL verification unit, 
certain of the other special characters
are allowed (see 15.3 and 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>).

---++++ 15.3 Lexical elements, separators, and delimiters
---+++++ Page 227, 1st paragraph of this section
The text of each design unit, apart from text treated specially 
due to the effect of tool directives (see 15.11),
is a sequence of separate lexical elements. Each lexical 
element is either a delimiter, an identifier (which
may be a reserved word), an abstract literal, a character 
literal, a string literal, a bit string literal, a comment,
a lexical element defined for a tool directive, or a lexical 
element defined in IEEE Std 1850-20<font color="red">10<strike> 05</strike></font> 
for a PSL declaration, a PSL directive, or a PSL verification unit.

---++++ 15.10 Reserved words
---+++++ Page 237, 1st paragraph of this page
Within a PSL declaration, a PSL directive, or a PSL verification unit, 
PSL keywords are reserved words (see 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>). 
A PSL keyword shall not be used as an identifier to declare a 
PSL declaration or a PSL verification unit. 
A PSL keyword that is a legal VHDL identifier may be used as an 
explicitly declared identifier other than to declare a PSL declaration 
or a PSL verification unit, but such a declaration is hidden
within a PSL declaration, a PSL directive, or a PSL verification unit (see 12.3).

---+++++ Page 237, last sentence of note 3 after the list of PSL keywords
Their use in PSL is defined in 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>. 
Other PSL keywords, reserved only within PSL declarations, PSL
directives, and PSL verification units, are defined in 
IEEE Std 1850-20<font color="red">10<strike> 05</strike></font>. 


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---++ Comments 

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Topic revision: r1 - 2017-04-02 - 16:17:13 - TWikiGuest
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