CollectedRequirements < P1076/Ballots

P1076/Ballots Web>CollectedRequirements (2020-02-17, JimLewis) (raw view)EditAttach
---+!! P1076 Proposals and Requirements

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---++!! Sections:

%TOC%

---

---++ Proposals Section

Details of and links to all proposal.

---+++ Proposal Summary + Link to Proposals

Status Values
   * RAW - initial development, may change frequently, comments welcome
   * RFC - draft, needs comments
   * REVIEW - requesting more formal review in working group meeting
   * STABLE - done

| *Item*  | *Who*  | *Status*  | *Rank* | *Description*  | *Supporters Priority* ||
| *Interface Related Proposals* | | | | | ||
| [[InterfaceAndBundleEnhancements][Interface and Bundle Enhancements]] | Main.P1076Group | In Progress | 22 | WG generated interface and bundle enhancements | ||
| [[Partiallyconnectedvectorsonportmap][Partially Connected Vectors on port map]] | Main.KevinJennings | RFC | 1 | Allows a port map vector (array) range slice to be left *open*. | ||
| [[NewBusModeForBidirectionalPortSignals]] | Main.BrianDrummond | | 40 | Add a "Bus" port mode for bidirectional port signals | ||
| [[ProtectedTypesPublicSignal][Protected Types with Public Signals]] | Main.JimLewis | | 44 | | ||
| [[InterfaceConstructandPortModeConfigurations][Interface Construct and Port Mode Configurations]] | Main.BrentHayhoe | | 45 | | ||
| [[PackageAsInterface][Packages as an Interface Construct]] | Main.JimLewis | | 53 | | ||
| [[ImplicitConnections][Implicit Parameter and Port Connections]] | Main.JimLewis | - | 54 | Shorthand notation for parameter and port maps | ||
| [[BidirectionalConnections][Bidirectional Connections]] | Main.KevinCameron | | 70 | Enable modeling of bidirectional components | ||
| [[RelatedRecords][Closely related record types]] | Main.RyanHinton | RFC | 75 | | ||
| | | | | | ||
| *Converting Things, Generally*  | | | | | ||
| [[CompositeValueString][Extend IMAGE attribute to arrays and records]] | [[Main.RyanHinton][Ryan Hinton]] | RFC | 12 | Extend IMAGE attribute and/or TO_STRING implicit function to composite types: arrays and records. | ||
| [[RecordIntrospection][Record Introspection]] | Main.ChrisHiggs | -  | 41 | Convert between a record and a vector | ||
| [[RecordMemberAttribute][Record Introspection & Indexing]] | [[Main.BrentHahoe][Brent Hayhoe]] | RFC | 69 | Proposal to allow indexing and scanning of elements within record structures. MERGED (WAS: Member attribute for records) | ||
| | | | | | ||
| *Language Regularization Proposals* | | | | | ||
| [[FunctionInterface][Allow access types and protected types on Function Interface]] | Main.JimLewis | - | 2 | - | ||
| [[MethodParametersAccessTypes][Protected Type Methods with Parameters that are Access Type, Protected Type, or File Type]] | Main.JimLewis | | 4 | Method Parameters with access types | ||
| [[SequentialDeclare][Sequential Declaration Regions]] | Main.JimLewis | - | 7 | - | ||
| [[CompositesProtectedTypes][Composites of Protected Types]] | Main.JimLewis | | 14 | Arrays and records containing protected types | ||
| [[ProtectedTypesAliases][Protected types and aliases]] | Main.JimLewis | | 17 | | ||
| [[InitObjectSizing][Sizing from initial values]] | Main.RyanHinton | - | 19 | Allow signal and variable constraints to be deduced from initial values. This is already allowed for constants, but this proposal extends the capability to variables and signals. | ||
| [[RemoveConfigurationLibraryRequirement][Relax Library Requirement on Configurations]] | Main.CliffordWalinsky | RFC | 23 | Allow configurations to reside in different libraries from their corresponding entities. | ||
| [[ConditionalExpressions][Conditional Expressions and/or Operator]] | Main.CliffordWalinsky, | | 36 | Allow the use of conditionals in expressions and initializers. | ||
| [[StopReadOnTrailingUnderscore][Stop Binary/Octal/Hex Read At Trailing Underscore]] | Main.CliffordWalinsky | RFC | 38 | Revise the specifications for the textio binary, octal, and hexadecimal read procedures to terminate reading when a trailing underscore is encountered. | ||
| [[SyntaxRegularlization][Syntax regularization - End]] | Main.JimLewis | | 55 | Particularly "End" | ||
| [[AdditionToAllKeywordInSensitivityLists][Process-All and Implicit Signals]] | [[Main.BrentHahoe][Brent Hayhoe]] | RFC | 56 | Allow implicit signals alongside the ALL keyword in sensitivity lists. | ||
| [[OptionalSemicolon][Syntax regularization - Optional Semicolon]] | Main.BertDeJong | RFC | 71 | Extra optional semicolon at end of interface_list | ||
| [[PackageNameCase][Package Name Case Sensitivity]] | Main.JimLewis | | 79 | | |
| [[EmptyRecord][Syntax regularization - Empty records]] | Main.RyanHinton | RFC | 82 | Allow record declations to have no members, analogous to a null array | ||
| [[ConditionalReturn][Conditional Return Statement]] | Main.JimLewis | - | 94 | - | ||
| | | | | | ||
| [[WriteBoolean][2008 Boolean Write]] | Main.JimLewis | Rejected | 20 | | |
| | | | | | ||
| *Integer Proposals* | | | | | ||
| [[ArbitraryIntegers][Integers of arbitrary length]] | Main.MartinThompson | RFC | 8 | Add integers of arbitrary length | ||
| [[LongIntegers][Long Integers 64 bit type]] | Main.CliffordWalinsky | - | 26 | Add a type for 64 bit integers, separate from integer | ||
| [[ModularTypes][Modular Integer Types]] | Main.MartinThompson | -  | 31 | | ||
| [[IntegerOperators][Additional Operators for Integers - logic]] | Main.JimLewis | | 51 | Add Logic Operators for Integers | ||
| [[ImplicitConversionNumeric][Implicit Conversions for Like Types]] | Main.JimLewis | | 81 | Addresses issues with assigning integer literals to unsigned, signed, real literals to ufixed, sfixed, and float, and vice-versa. Obviously with some constraints. | ||
| [[ExtendedIntegers][Extended Integers]] | Main.DanielKho | RAW | | Require a minimum of 64 bits for integers. | ||
| [[PhysicalTypeRange][Physical Type Range]]  | Main.KevinThibedeau | | | Require that user-defined physical types can cover the same range as time. | ||
| [[EnhancedIntegers][Enhanced Integers]]  | Main.JonasBaggett | RFC | None | New derived integer types fittable for synthesis. | ||
| | | | | | ||
| *Language Enhancement* | | | | | ||
| [[DateTime][date and time system functions]] | Main.JimLewis | - | 11 | - | ||
| [[ReportCallingPath][Modify Report Statement to return calling path of subprograms]] | Main.PeterFlake Main.MartinThompson | | 15 | | ||
| [[PathnameSharedVarSubprograms][PATH_NAME and Shared Variables and Subprograms]] | Main.JimLewis | - | 32 | | ||
| [[AnonymousTypes][Anonymous Types on Interfaces]] | Main.JimLewis | - | 16 | - | ||
| [[EnumAttributes][Attributes for Enumerated Types]] | Main.JimLewis | - | 18 | - | ||
| [[DpiProposal][DPI Proposal]] | Main.PeterFlake | - | 21 | Direct interface to other languages | ||
| [[HierarchicalNamespaces][Hierarchical Libraries]] | Main.ChrisHiggs | -  | 25 | library protocol.packet.ethernet | ||
| [[ExternalNameTypes][External names for types]] | Main.JimLewis | - | 28 | See Alternative Proposal. Needed to access the type of a statemachine from tesbench. | ||
| [[StandardPackages][Updates to standard packages - split into LRM and Packages]] | Main.RyanHinton | RFC | 29 | Additions to LRM, standard, std_logic_1164, numeric_std, math_real, math_complex, and fixed_pkg | |
| [[GarbageCollection][Garbage Collection]] | Main.CliffordWalinsky | | 30 | Garbage collection | ||
| [[ProtectedTypeComposition][Composition with Protected Types]] | Main.JimLewis | RFC | 33 | Composition with protected types | ||
| [[GenericTypes][Protected Types with Generic Clause]] | Main.JimLewis | RFC | 34 | - | ||
| [[ConfigureDirectInstantiation][Configuration Spec for Direct Instances]] | Main.RyanHinton | RFC | 37 | Add a facility to write a configuration specification to control architecture selection possibly several hierarchy layers deep for a direct instantiation.  | | |
| [[PslAttributes][Attributes for PSL]] | Main.JimLewis | - | 43 | - | ||
| [[ProtectedTypeWaitSignal][Protected Types with Wait and Private Signals]] | Main.JimLewis | | 46 | | ||
| [[ProtectedTypeEntity][Protected Type on Entity Interface]] | Main.JimLewis | | 47 | | ||
| [[MapSubprogramGenericOnCall][Map subprogram generics on call]] | Main.JimLewis | RFC | 49 | - | ||
| [[AssertApi][API for Assert]] | Main.JimLewis | - | 50 | - | ||
| [[SliceMultidimensionArrays][Slicing Multidimensional Arrays]] | Main.RyanHinton | | 52 | | ||
| [[ExternalNon-SharedVariableName][External Non-Shared Variable Name]] | [[Main.BrentHahoe][Brent Hayhoe]] | RFC | | Add the ability to reference local process variables and pre-VHDL92 shared variables via the 'external name' syntax. | ||
| [[ArrayTypeGenerics][Array type generics]] | Main.RyanHinton | - | 59 | Indicate that a generic type is an array of another generic type. | ||
| [[NewPredefinedAttributeActual][ New Predefined Attributes: actual, and formal]] | [[Main.BrentHahoe][Brent Hayhoe]] | RFC | 60 | Allow explicit selection of actual or formal part of an instantiated subprogram's parameter. | ||
| [[ConditionalCompilation][Conditional Compilation]] | Many | - | 61 | solve tool-specific language issues | ||
| [[AbstractPackages][Abstract Packages]] | Main.JimLewis | - | 62 | - | ||
| [[WaitLevel][Wait with Level Check]] | Main.JimLewis | | 63 | Wait with level sensitive check | ||
| [[UnionsVariants][Unions and/or Variant Records]] | Main.JimLewis | RAW | 65 | Need unions to describe coverage that can either be a range or a single value | ||
| [[ExpressionsInBitStringLiterals][Expressions in Bit String Literals]] | [[Main.BrentHahoe][Brent Hayhoe]] | RFC | 66 | Adds the facility to define the bit width of the string literal with an integer expression. | ||
| [[RequireResolution][Required Simulator Resolution]] | Main.JimLewis | | 67 | Need construct or subprogram to specify minimum simulator resolution required by a design unit. It is an error for a simulation to enumerate with larger value. | ||
| [[RelaxedOthersAggregate][Relaxed OTHERS rules in aggregates]] | Main.RyanHinton | RFC | 68 | Relax the rules for using OTHERS in array aggregates | ||
| [[FunctionKnowsVectorSize][Function Knows Return Vector Size]] | Main.KevinJennings | RFC | 72 | Allows functions to access attributes of the target of the function | ||
| [[DeferredSharedVariables][Deferred Shared Variables]] | [[Main.BrentHahoe][Brent Hayhoe]] | LCS | 80 | Shared variables & protected types in same package. | ||
| [[OrderingAllInterfaceLists][Remove Ordering Restrictions on Interface Lists]] | Main.CliffordWalinsky | RFC | 86 | Allow entity and subprogram interface objects to refer to earlier objects of the same interface list. | ||
| [[RangeOperations][Operations on Ranges]] | Need Owner | | 99 | Support Operations on Ranges | ||
| [[OverloadAssignment][Overload Assignment Operator]] | OPEN | | 102 | Ability to overload the assignment operator := would be useful | ||
| [[ExtendedStringLiterals][Extended String Literals]] | Main.JimLewis, Main.DanielKho | | | Support C Style String Literals | ||
| [[ExtendedRanges][Extended Ranges]]  | Main.PatrickLehmann | RAW | None | Make ranges more powerful. | ||
| [[ExtendedUserDefinedAttributes][Extended user-defined attributes]]  | Main.PatrickLehmann | RAW | None | Let users define new attributes, which for example map to functions. | ||
| | | | | | ||
| *New proposals* | | | | | ||
| Link your new proposal here | | | | | ||

---+++ Someday Maybe Proposals
| *Item*  | *Who*  | *Status*  | *Rank* | *Description*  | *Supporters Priority* ||
| [[VectorLiteralntrospection][Vector literal introspection]] | Main.JimLewis | RFC  | 35 | Distinguish between std_logic_vector and integer_vector literals  | ||
| [[ObjectOrientation][Object Orientation]] | | | 39 | Links to different proposals | ||
| [[WaitRepeat][Wait with a repeat count]] | Main.JimLewis | - | 48 | - | ||
| [[CrossLanguageInstances]] | | | 73 | Related to DPI | ||
| [[StdulogicResolution][Std_ulogic, Resolved, and '-']] | Main.JimLewis | | 74 | Resolution of '-' and 'Z' is 'X", ok for RTL, but bad for testbenches? | ||
| [[NaturalVector][Create natural_vector]] | Main.JimLewis | | 78 | Create natural_vector as a subtype of integer_vector | ||
| [[ArchitectureGeneric][Architecture Generic]] | Main.LarsJensen | RFC | 83 | Implements architecture instantiation through generics | ||
| [[MultipleDesignHierarchies][Multiple Top-Level Designs]] | Main.CliffordWalinsky | Needs Work & Advocate | 88 | Allow designs to have multiple top-level roots. To be a common enhancement, it needs someone with a use case to work on it. | ||
| [[PreponedProcess][Preponed Processes (clocks)]] | Main.JimLewis | - | 89 | Desc | ||
| [[UpdateStdLogicArith][Update std_logic_arith]] | Main.JimLewis | | 90 | Update std_logic_arith to simplify interoperability with numeric_std | |
| [[DynamicProcessInstance][Dynamic Process, Instances, Fork Join]] | | | 91 | | ||
| [[ShorthandSubprogram][Shorthand Subprogram Declarations]] | Main.JimLewis | - | 92 | - | ||
| [[SequentialSignal][Sequential Signal Declarations]] | Main.JimLewis | - | 93 | - | ||
| [[TruthTable][Truth Tables]] | Need Owner | | 98 | Truth table for multi-input/multi-output | ||
| [[Asynchronous Channels]] | Main.KevinCameron | | 100 | Asynchronous channels (aka pipes) | ||
| [[ClockedShorthand][Clocked Shorthand]] | Main.DanielKho | RFC | 103 | Shorthand to infer flip-flops and pipelining | ||
| [[DynamicRewiring][Dynamic Rewiring]] | Main.KevinCameron | | 105 | Allow runtime re-elaboration and re-wiring | ||
| [[ComposingExteranlPathName][Composing Paths to External Names]] | Main.JimLewis | | | | ||
| [[AttributeShorthand][Attribute Shorthand]] | Main.DanielKho | RAW | | Shorthand to create attributes. | ||
| [[SupportReal][Support Synthesis of Reals]] | Main.DanielKho | RAW | | Simplify synthesis of floating-point operations, by using real to encapsulate synthesizable fixed- or floating-point types. | ||
| | | | | | ||

---+++ Rejected Proposals
| *Item*  | *Who*  | *Status*  | *Rank* | *Description*  | *Supporters Priority* ||
| [[NoOverridingPredefinedAttributes][Predefined Attributes Can't Be Redefined]] | Main.CliffordWalinsky | RFC | 42 | Prohibit predefined attributes from being redefined. | ||
| [[NamedPkgbody][Named Package Bodies]] | Main.JimLewis | - | 64 | - | ||
| [[UniqueCondition][Unique Condition - OrIf]] | Main.PeterFlake | | 76 | | ||
| [[SynthesizableReportsAssertions][Synthesizable Reports and Assertions]] | Main.DanielKho | RFC | 77 | Standardize constructs that allow reports and assertions to be able to be synthesized. | ||
| [[SimulationControls][Simulation Controls]] | | | 84 | | ||
| [[NewRulesBitLiterals][Additional Rules for Bit String Literals]] | Main.DanielKho | RFC | 85 | Specify additional rules for string literals. | ||
| [[RecommendErrorMessages][Recommend Error Messages]] | Main.ChrisHiggs | -  | 95 | Standard format for error messages | ||
| [[MixedSignalSupport][Mixed Signal Support]] | Main.KevinCameron | | 96 | Support multiple types driving/receiving on a wire | [ ||
| [[MultiCyclePath][Multicycle Path Specification]] | | | 97 | Speciification of multi-cycle paths in language syntax | ||
| [[AtomicComposites]] | Needs Owner | | 101 | | ||
| [[ProtectedTypeOperators][Operators Overloading for Protected Types]] | Need Owner | | 104 | Operator Overloading for Protected Types | ||
| [[2State][2 and 4 State values]] | Needs Owner | | 108 | | ||
| [[TimingConstraints][Specifying Timing Constraints]] | Main.DanielKho | RAW | | Allows RTL designers to specify timing constraints directly from HDL. | ||
| [[SynthesizableEvent][Synthesizable 'event Attribute]] | Main.DanielKho | RAW | | Synthesize 'event for DDR FFs. | ||
| [[Object Inspection]]  | Main.JingPang | RAW | | Method to do introspection on names, find different objects and find all instance labels whose component is xyz. | ||
| | | | | | ||

---+++ Change Proposals for IEEE Packages
| *Item* | *Who* | *Status* | *Rank* | *Description* | *Supporters Priority* |
| [[FixedFloatUpdates][numeric_std, fixed and float bugs and consistency updates]] | Main.DavidBishop | | 3 | Bug fixes and consistency updates for numeric_std, fixed_generic_pkg.vhd, and float_generic_pkg.vhd | |
| [[RealMatrixPackage][Real Matrix Math Package]] | Main.DavidBishop | REVIEW | 5, 10, 13 | [[http://www.vhdl.org/fphdl/real_matrix_ug.pdf][Matrix Math User's Guide (pdf)]]<br /> [[http://www.vhdl.org/fphdl/real_matrix_pkg.zip][Packages (zip)]]  | Must Do |
| [[http://www.vhdl.org/fphdl/fixed_alg_ug.pdf][Fixed point Algorithmic User's Guide (pdf)]] | Main.DavidBishop | REVIEW | | [[http://www.vhdl.org/fphdl/fixed_alg_pkg.zip][Package (zip)]] | |
| [[http://www.vhdl.org/fphdl/float_alg_ug.pdf][Floating point Algorithmic User's Guide (pdf)]] | Main.DavidBishop | REVIEW | | [[http://www.vhdl.org/fphdl/float_alg_pkg.zip][Package (zip)]] | |
| [[FileIo][File IO / TextIO updates]] | Main.JimLewis | - | 6 | - | |
| [[MetavalueConditionalConversions][Flag metavalues detected by ??]] | Main.JimLewis | | 9 | | ||
| [[TextioBvSlv][Read differences of bit_vector and std_logic_vector]] | Main.JimLewis | | 27 | | |
| [[StandardPackages][Updates to standard packages - split into LRM and Packages]] | Main.RyanHinton | RFC | 29 | Additions to LRM, standard, std_logic_1164, numeric_std, math_real, math_complex, and fixed_pkg | |

---+++ ISAC and Items that Must Do
| *Item*  | *Who*  | *Status*  | *Last Modified* | *Description*  | *Supporters Priority* ||
| [[EncryptionUpdates][P1735 Encryption Updates]]  | Main.JarekKaczynski Main.JohnShields | STABLE | | Adopt Recommendation from P1735 | Must Do ||
| [[IPVisibilityUpdates][P1735 Visibility Updates]] | Main.StevenDovich | | | Alignment with P1735 visibility model | Must Do ||
| [[AssociationListSignatures][Signatures for Association List Aspects]] | Main.CliffordWalinsky | RFC | | Describes how to resolve ambiguous mappings of subprograms to overloaded interface subprograms in generic map aspects. | Must Do ||
| [[EnhancedGenericsInAttributeSpecs][Assigning 2008 Entities to Attribute Classes]] | Main.CliffordWalinsky | RFC | | Describes how subprogram instances, interface subprograms, package instances and interface packages match entity classes in attribute specifications. | Must Do ||
| [[Repair2008LRM142Example][Repair LRM Example 14.2]] | Main.CliffordWalinsky | | | Fix for one of the examples in LRM Section 14.2. | Must Do ||
| [[Fix2008LRM7321][Repair LRM Example 7.3.2.1]] | Main.DanielKho | RFC | | Fix the example in 7.3.2.1. | Must Do ||
| [[Fix2008ContextClause][Repair Text on Context Clauses]] | Main.DanielKho | RFC | | Fix the LRM's text for context clauses. | Must Do ||
| [[Repair2008LRM168243Section][Repair LRM Section 16.8.2.4.3 Missing Paragraph Text]] | [[Main.BrentHahoe][Brent Hayhoe]] | RFC | | Correct section header numbering in VHDL 2008 LRM. | Must Do ||
| [[RepairExample563][Repair example in LRM section 5.6.3]] | Main.TristanGingold | | | Fix example in 5.6.3 | Must Do ||
| [[BitStringLiteralsCornerCases][Bit String Literals Corner Cases]] | Main.TristanGingold | | | Fix minor issues in 15.8 | Must Do ||
| [[FixGenerateStatement][Repair Generate Statements]] | Main.TristanGingold | | | Fix wording and feature | Must Do ||
| [[ForcingOutports][Force an Out Port]]  | Many  | | | | ISAC Must Do ||
| [[PrecedenceUnaryLogical][Precedence of Unary Logical Operators]] | Main.JimLewis | | | | ISAC Must Do ||
| [[StringsFromExtendedId][String representation for extended identifiers]] | Main.PeterFlake | | | | ISAC Must Do ||
| [[AlternatePathName][Alternate Label in Path Name bug 293]] | Main.PeterFlake | | | | ISAC Must Do ||
| [[RepairExampleInSection2321Proposal][Repair Example in Section 23.21 Proposal]] | Main.RadoslawNawrot | | | Fix for LRM VHPI example | Must Do ||
| [[LRM2008TypographicalIssues][Typographical Issues in IEEE Std 1076-2008]] | Many | | | A collection of typographical issues in the LRM that don't have a separate page | Must do ||
| [[ProcessAllIncudesAllReachableSubprograms][Process-All Should Not Be Sensitive to Signals in Packages]] | Main.CliffordWalinsky | RFC | | Ranking: 87 - Designs are in error if they have a process(all) block that calls a package's subprogram that references a signal. Since this error is costly to accurately verify, remove this requirement. | ||
| [[GenericPackageIssues][Fix generic map rules]] | Main.TristanGingold | | | | Must Do ||
| | | | | | ||

---+++ Open Issues Looking for an Owner
| *Item* | *Who* | *Status* | *Description* | *Supporters Priority* ||
| [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-ft/proposals/VHDL-2005-VHPI-impact.pdf][VHPI Impact]] | | | VHDL-2008 impact to VHPI | ||
| [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-ft/proposals/vhpiPSLassertion.pdf][VHPI for PSL]] | | | PSL impact to VHPI | ||
| [[PslHarmonization][PSL Harmonization]] | OPEN | | | Update for 1850-2010 | |
| [[EnvStop][define parameters for env.stop]] | OPEN | | | Define standard parameters for env.stop | |
| [[FloatInstance][Standard Instances of Float]] | OPEN | | | Define standard instances of float_generic_pkg and fixed_generic_pkg | |
| [[MoveText][Move definition of TEXT, INPUT, OUTPUT]] | OPEN | | | Move definition of TEXT, INPUT, and OUTPUT | |

---+++ VHDL AMS 1076.1 Proposals that go in 1076

The packages listed in this table are planned to be included in P1076.1-201x. In discussions a while ago with the P1076 WG some members expressed interest in these packages as well. Coordination between the WGs is required to ensure that the same versions are included in both places.
| *Item*  | *Who*  | *Status*  | *Last Modified* | *Description*  | *Supporters Priority* |
| Table Driven Modeling | Joachim Haase et.al.  | Draft of reference implementation available | 5/24/2012 | The package supports the description of functional dependencies y = f(x<sub>1</sub>, x<sub>2</sub>, ..., x<sub>n</sub>) based on a number of (n+1)-tupels (y, x<sub>1</sub>, x<sub>2</sub>, ..., x<sub>n</sub>). Emphasis is on floating point functions, and various interpolation schemes are supported. More details, and a reference implementation can be found in a [[P10761.ProjectTableDrivenModeling][protected area]] of the P1076.1 web. | High for P1076,1-201x. |
| Vector/matrix package | David Bishop, Zhichao Deng | | | It's the same package listed in the next table | High for P1076,1-201x. |

---+++ Proposals for 1076.6 - Requires a Chair for this activity

This work would potentially be done by a separate working group. Requires a chair. Main.JimLewis will help you through the IEEE process, but you will need to get vendor participation for the effort to be relevant.

| *Item*  | *Who*  | *Status*  | *Last Modified* | *Description*  | *Supporters Priority* |
| [[FSMSafeDesign][FSM Safe Design]] | [[Main.BrentHahoe][Brent Hayhoe]] | RFC | | Proposal to allow safe state identification for synthesis in FSM designs. | |
| [[SynthesisAttributes][Synthesis Attributes]] | | | | Attributes for RAM, ROM, ... Define these in 1076? | |
| [[AssertionDirectives][Assertions as Directives]] | main.JimLewis | | | Support ZeroOneHot, ... | |
| [[SupportReal]] | | | | | |
| [[SynthesizableEvent][Synthesizable 'event]] | | | | | |
| | | | | | |
| | | | | | |

---+++ Items to forward to open source package group
| *Item* | *Who* | *Status* | *Last Modified* | *Description* | *Supporters Priority* |
| [[ReadRom][File IO for RTL ROM]] | Main.JimLewis | | | Ranking: 24 - File IO for RTL ROM | ||
| [[FunctionalCoverage][Functional Coverage]] | Main.JimLewis | RFC | | Implemented by open source group [[http://www.osvvm.org][OSVVM]] | |
| [[RandomStimulus][Random Stimulus]] | Main.JimLewis | RFC | | Implemented by open source group [[http://www.osvvm.org][OSVVM]] | |
| [[SemaphoreDataStructure][Semaphores]] | | | | | |
| [[ExtendedHwFunctions][Extended Hardware Functions - RTL Macros]] | | | | RTL Macros. Meeting: [[MeetingDecember15][Dec 15, 2011]] and [[MeetingMarch31][Mar 31, 2011]] | |
| Associative Arrays | | | | See [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-tbv/vhdl-200x-tbv.pdf][TBV Propoal 2]] | |
| Queues / FIFO | | | | See [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-tbv/vhdl-200x-tbv.pdf][TBV Proposal 4]] | |
| Sync and Handshaking | | | | See [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-tbv/vhdl-200x-tbv.pdf][TBV Proposal 7]] | |
| Memory / Sparse array | | | | See [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-tbv/vhdl-200x-tbv.pdf][TBV Proposal 12]] | |
| Loading and Dumping Memories | | | | See [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-tbv/vhdl-200x-tbv.pdf][TBV Proposal 18]] | |
| Lists | | | | See [[http://www.eda-twiki.org/vhdl-200x/vhdl-200x-tbv/vhdl-200x-tbv.pdf][TBV Proposal 19]] | |
| Create open source boost/C++ like libraries | | | | Meeting: [[MeetingDecember15][Dec 15, 2011]] | |
| [[IntegerConv][to_integer and to_integer_vector]] | Main.JimLewis | - | | - | |
| [[GraphicsLibrary][Graphics Library]] | Main.DanielKho | RAW | | Implement a graphics library for VHDL. | ||
| [[RegularExpressions][Regular Expressions]] | Main.DanielKho | RAW | | Implement VHDL regular expressions. | ||
| | | | | | |

---+++ Rejected Item Summary
| *Item* | *Who* | *Status* | *Description* | *Supporters Priority* |
| [[UseOfUnicode][Use of Unicode]] | Main.MartinThompson | Reject | Add unicode for strings, files, identifiers, comments | |
| [[KeywordScope][Scope of Keywords]] | Main.JimLewis | Reject | Give names same scope as keywords | |
| [[ComponentDerivedFromEntity][Component Declaration derived from Entity Declaration]] | Main.JimLewis | Reject | Syntax that creates a component declaration from an entity decalaration and puts it into a specified package | |
| | | | | |
| | | | | |

---+++ Items Subsumed by other items
| *Item* | *Who* | *Status* | *Description* | *Supporters Priority* |||
| | | | | | ||
| [[RecordIndexing][Record Indexing]] | [[Main.BrentHahoe][Brent Hayhoe]] | Subsumed | | See:- [[RecordMemberAttribute][Record Introspection & Indexing]] | ||
| [[SignalPools][Signal Pools]] | Main.KevinCameron | | | Ranking: 106 - Alternative to wire-like communication for RF | ||
| [[UserDefIOrules][User Defined IO Rules]] | Main.KevinCameron | | | Ranking: 107 - Move rules about in/out/inout to types | ||
| | | | | |||
| [[FunctionsKnowOutputSubtype][Withdrawn: Functions Know Output Subtypes]] | OPEN | RFC | | Allows function to access subtype properties of the target. | ||
| [[SyntaxEntityComponent][Redundant: Syntax regularazation Entity Component]] | OPEN | | | Syntax regularazation between entity and component | ||
| [[ProtectedTypeUpdates][Protected Type Updates]] | Main.JimLewis | - | | Numerous | ||

---+++ Raw Requirements Lists
| *List* | *Description* | *Notes* |
| [[http://www.eda-twiki.org/twiki/bin/view.cgi/P1076/Vhdl2019ActiveIRTwiki][ISAC Active IR List]]  | | |
| [[P1076.Vhdl2019ActionItems][Old Meeting Action Item List]]  | Current Action Items now tracked in meeting minutes | |
| [[https://bugzilla.mentor.com/buglist.cgi?query_format=specific&order=relevance+desc&bug_status=__all__&product=&content=][Bugzilla List]]  | | |
| [[IeeeVHDL2008Lists][IEEE VHDL 2008 Subgroup Lists (TBV, FT, DTA, )]] | | |
| [[AccelleraVHDL2008Lists][Accellera VHDL 2008 Remaining Items List]] | | |
| [[RawRequirements][Raw Requirements in Text of Original Page]] | | |

   * [[%ATTACHURL%/vhdl_requirements_priority.xlsx][vhdl_requirements_priority.xlsx]]: VHDL Requirements Prioritization Sheet

---++ LCS Section

Details of all LCS documents.

---+++ LCS Documents for Balloting

| *LCS* | *Proposal* | *Ballot* |
| [[P1076.TopLCS2016_080a][LCS-2016-080]] | [[DeferredSharedVariables][Deferred Shared Variables]] | |
| | | |

---+++ Approved LCS Documents

| *LCS* | *Proposal* | *Votes For* | *Votes Against* |
| | | | |

---+++ Rejected LCS Documents

| *LCS* | *Proposal* | *Votes For* | *Votes Against* |
| | | | |
Attachments
I	Attachment	Action	Size	Date	Who	Comment
xls	Accellera_RequirementsStatus_19May2006.xls	manage	131.0 K	2011-09-08 - 15:09	JimLewis	Accellera Requirements List from VHDL-2008
pdf	Corrections_to_the_Encryption_Flow_description_in_IEEE_Std_1076.pdf	manage	204.8 K	2012-03-15 - 15:10	JarekKaczynski	Based on the works of P1735 group
txt	Proposal.txt	manage	2.8 K	2013-08-28 - 17:27	DavidBishop	Instructions to fix bugs in "fixed_generic_pkg-body.vhdl", "float_generic_pkg-body.vhdl" and the fixed point documentaiton
xlsx	vhdl_requirements_priority.xlsx	manage	16.1 K	2014-11-13 - 21:17	JimLewis	VHDL Requirements Prioritization Sheet
Topic revision: r226 - 2020-02-17 - 15:50:35 - JimLewis
P1076/Ballots