This repository, VHDL-Issues, is for issues in the VHDL language, especially in the Language Reference Manual (LRM). Any user can request/propose/ask modifications to the upcoming revisions of the language.
At first transform pure text, tables and code to chapters (or smaller compartments) on a branch named "<username>/chapter-XX"
Then we'll merge the rough chapter contents into chapter-integration, so we can then work on document spanning topics like "missing in" or "indentation"