(r1) 2020_0514_Meeting < P1076

P1076 Web>Vhdl202X_MeetingMinutes>2020_0514_Meeting (revision 1) (raw view)~~EditAttach~~

---+ P1076 Minutes from May 14, 2020
---++ Attendees
   * Jim Lewis, Rob Gaddi, Peter Flake, Pablo Blecua

---++ Meeting Discussion

   * Next Revision
   * Ideas from Email
      * Granular control over numeric std warnings / error / failure
         * Sense is that able to promote to FAILURE, but not on by default.
            * If put in a protected type, can turn it on or off in another package
            * Need warning if there are multiple conflicting calls to settings.
               * Because different packages may try diff settings.
               * 
         * Integer truncation
            * A5_uv + 254 ; -- Warning? should be Failure?
            * for i in 1 to 100 loop A4_uv := X"0" + i ; -- Warning when i &gt; 16 -- fails to meet intent of VHDL - FAILURE
            * for i in 1 to 100 loop A4_uv := X"0" + (i mod 16) ;-- no warnings
            * Rob: unsigned - expect modular behavior
            * 1 improvement - signal errors in "+" rather than "to_integer"
            * Alternate - to_integer uses new 2019 calls stack information
         * Unsigned * Integer
            * Size of result?
            * A_uv * 3D"5" ;
      * 0 bit numeric types - AI Ryan
      * Automatic Port/Parameter Association Lists

---++ Next Meeting

Thursday May 28, 2020, 11 am Pacific *Daylight* Time (GMT-7)

Tenative Agenda:

   * Focus on collected requirements list - get it updated to agreed upon items from previous meetings
      * With goal of inviting people to add to the list
   * Next step - list of proposals to rank.

---++ Comments

%COMMENT%

Topic revision: r1 - 2021-05-01 - 16:48:42 - TWikiGuest

P1076