TWiki
>
P1076 Web
>
Vhdl2019MeetingMinutes
>
2016_MeetingJuly14
(revision 1) (raw view)
Edit
Attach
<!-- Set ALLOWTOPICCHANGE = P1076AdminGroup --> <span style="color: #630000; font-size: 22.75px; line-height: 1em; background-color: transparent;">P1076 July14, 2016 Meeting Minutes</span> ---++!! Attendees: * Brent Hayhoe, Peter Flake, Patrick Lehmann, Jim Lewis, Rob Gaddi, Lieven Lemiengre ---++!! Agenda: <br />%TOC% ---++ Meeting Discussion * Item 37 [[ConditionalExpressions]] moved to Language Regularization proposals priority 36 * 38: [[ConfigureDirectInstantiation][Configuration Declaration for Direct Instances]] moved to Language Enhancement * 39: [[StopReadOnTrailingUnderscore][Stop Binary, Octal, Hex read before trailing underscore]] moved to Language Regularization * 40: [[ObjectOrientation][OO]] some day maybe list * 41: [[NewBusModeForBidirectionalPortSignals][Bus Mode]] - part of interface discussion * 42: [[RecordIntrospection][Record introspection]] Associate with inteface, although it is also an enhancement - similar to some of the enum attributes * 43: [[NoOverridingPredefinedAttributes][No Overriding Predefined Attributes]] Reject * 44: [[PslAttributes][Attributes for PSL]] Enhancement * 45: [[ProtectedTypesPublicSignal][Protected Types with Public Signals]] Interfaces * 46: [[InterfaceConstructandPortModeConfigurations][Interface Construct and Port Mode Configurations]] Interfaces * 47: [[ProtectedTypeWaitSignal][Protected Types: Wait and Private Signals]] Enhancement * 48: [[ProtectedTypeEntity][Protected Type: Shared Variables On Entity Interface]] Enhancement * 49: [[WaitRepeat][Wait with repeat count]] some day maybe * 50: [[MapSubprogramGenericOnCall][Map Subprogram Generics on call]] Enhancement - Lieven prototyped it to explore it viability * 51: [[AssertApi][API for VHDL Assert Statements]] Enhancement - ?call back? * 52: [[IntegerOperators][Additional Operators to Integers]] Integer Enhancement * 53: [[SliceMultidimensionArrays][Slicing Multidimensional Arrays]] Enhancement * 54 - [[PackageAsInterface][Interfaces: Packages as an Interface Construct]] Interface * 55 - [[ImplicitConnections][Implicit Parameter and Port Connections]] working on verbosity problem of interfaces - hopefully interfaces will solve this. * 56 - [[SyntaxRegularlization][Syntax Regularlization]] - Regularization * 57 - [[AdditionToAllKeywordInSensitivityLists#Process_ALL_and_Implicit_Signals][Process ALL and Implicit Signals]] Regularization * 58 - [[ExternalNon-SharedVariableName#External_Non_Shared_Variable_Nam][External Non-Shared Variable Name]] Enhancement, but likely to be rejected * 59 - [[http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/IntegerConv#Integer_and_Integer_vector_conve][Integer and Integer_vector conversions]] forward to open source package group * 60: Array Type Generics [[ArrayTypeGenerics]] Enhancement * 61: New Predefined Attributes: 'actual and 'formal [[NewPredefinedAttributeActual]] associate with [[FunctionKnowsVectorSize]] Both are enhancements * 62: Conditional Compilation [[ConditionalCompilation]] enhancement * 63: Abstract Packages [[AbstractPackages]] - link with array type generics - Enhancements ---++ Review and Approve Meeting Minutes: Rob, Lieven, Brent ---++ Next Meeting: Thursday [[2016_MeetingJuly21][July 21, 2016]], 11 am Pacific ---+++ Previous Meeting: Thursday [[2016_MeetingJune30][June 30, 2016]]
Edit
|
Attach
|
P
rint version
|
H
istory
:
r3
<
r2
<
r1
|
B
acklinks
|
V
iew topic
|
Raw edit
|
More topic actions...
Topic revision: r1 - 2020-02-17 - 15:36:16 -
TWikiGuest
P1076
Log In
or
Register
P1076 Web
Create New Topic
Index
Search
Changes
Notifications
RSS Feed
Statistics
Preferences
Webs
Main
P1076
Ballots
LCS2016_080
P10761
P1647
P16661
P1685
P1734
P1735
P1778
P1800
P1801
Sandbox
TWiki
VIP
VerilogAMS
Copyright © 2008-2026 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki?
Send feedback