TWiki
>
P1076 Web
>
Vhdl2019MeetingMinutes
>
2016_MeetingJanuary7
(2020-02-17,
JimLewis
)
(raw view)
E
dit
A
ttach
<!-- Set ALLOWTOPICCHANGE = P1076AdminGroup --> ---+!! P1076 January 7, 2016 Meeting Minutes ---++!! Attendees: * Lieven Lemiengre, Peter Flake, Rob Gaddi, Ryan Hinton, Jim Lewis ---++!! Agenda: %TOC% ---++ Meeting Discussion * Review Interface Proposals * What's Next - see http://www.eda.org/twiki/bin/view.cgi/P1076/PrivateDocuments file: _summary_vhdl_requirements_priority-1.xlsx * Improved Integer Support * See: [[https://docs.google.com/document/d/1hjbi-wOXhtGvjPt7PcC_XSH-siwK4eHERBkGX1vQfyQ/edit?pref=2&pli=1#][Google Doc by Lieven]] * Ryan: Bit-wise operators is secondary, want integer that can be bigger when want * Modular types: Record with value and range - how make range static? * If not static slow, if not power of 2 slower * ADA is more like a subtype constraint * Should it be a power of 2 or non-power of 2 range (addresing 3 memories with power of 2 addresses) * Need something that interoperates seemlessly with integer * Need requirements list, use models, and trade-offs (ranged, modular, cross-assignments) * Resume on line 15 next meeting ---++ Review and Approve Meeting Minutes: * NA ---++ Next Meeting: Thursday [[2016_MeetingJanuary21][January 21, 2016]] 11 am Pacific ---+++ Previous Meeting: Thursday [[2015_MeetingDecember17][December 17, 2015]]
E
dit
|
A
ttach
|
P
rint version
|
H
istory
: r3
<
r2
<
r1
|
B
acklinks
|
V
iew topic
|
Ra
w
edit
|
M
ore topic actions
Topic revision: r3 - 2020-02-17 - 15:36:16 -
JimLewis
P1076
Log In
or
Register
P1076 Web
Create New Topic
Index
Search
Changes
Notifications
RSS Feed
Statistics
Preferences
Webs
Main
P1076
Ballots
LCS2016_080
P10761
P1647
P16661
P1685
P1734
P1735
P1778
P1800
P1801
Sandbox
TWiki
VIP
VerilogAMS
Copyright © 2008-2026 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki?
Send feedback