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<!-- * Set ALLOWTOPICCHANGE = P1076AdminGroup --> ---+!! P1076 January 16, 2014 Meeting Minutes ---++!! Attendees: * Main.CliffordWalinsky * Main.PeterFlake * Main.RyanHinton * Main.JimLewis ---++!! Agenda: %TOC% ---++ Action Item Review * Cliff: 276: '_' at the end of hex and octal reads * Current implementation does not read training '_' * Will write up proposal * Cliff: 113: IR 2075/2092 impacts closely related array type conversions * Review with John Ries, was a change made in 2008? * Ryan: 292 Configure Architecture of Direct Entity Instantiation. * Have initial proposal at [[ConfigureDirectInstantiation]] * Need Owner * 207: Stop in environment package. Return values ambigous as to what can be done with them. * Reserve a range for the LRM uses? * Place requirement on implementation to make the return value available some how. * 139: PSL_Declaration should not be in Declaration Find Owner * Steven Dovich: 218: Review and determine if it will be relevant given P1735 changes * Steven Dovich: 149: IP protect * Steven: 125: vhpiCbValueChange trigger event specification has redundancy (talk to Peter and see if it was done). * Done Jim: 188: Explicitly declared terminals and quantities not defined in LRM AI Jim Forward to 1076.1 working group * Done Jim: Annotated VHDL-2008. See [[PrivateDocuments][Private Documents]] * Peter: 104: String representation not correct for enums which are extended identifiers * Peter did write up in bugzilla will migrate to a proposal. * David Bishop * 172 (lost) : Fixed point to_string error * 164 (lost) : Argument order: to_integer & to_real in float_generic_pkg * 161 (lost): Nit: Function declaration format * 160 (lost): --- * 158 (lost): logic operations and result sizing: fixed vs. float * 127: Read for Float ---++ Review [[https://bugzilla.mentor.com/buglist.cgi?query_format=specific&order=relevance+desc&bug_status=__all__&product=&content=][Bugzilla Issues]] * Jim 100 : for 1076.1: DOMAIN_TYPE missing in 3.1.1.1 * 95- marked as invalid * Chucks concerns are that: A xnor B xnor C /= xnor(A,B,C). * And for xnor reduction operations, xnor A(2 downto 0) = not xor A(2 downto 0) and is not the same as A(2) xnor A(1) xnor A(0). * If one interprets xnor A(2 downto 0) as a 3 input xnor gate this exactly matches how hardware and Verilog works, and hence, the VHDL-2008 impementation is ok. * 83 Marked as fixed: LRM was fixed as described in Peter's last paragraph. * Next Item to review 66 or 297 or larger ---++ Review and Approve Meeting Minutes: * Motion: Ryan 2nd: Peter ---++ Next Meeting: Thursday [[2014_MeetingJan30][January 30, 2014]], 8 am Pacific ---+++ Previous Meeting: Thursday [[2014_MeetingJan2][January 2, 2014]]
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Topic revision: r1 - 2020-02-17 - 15:36:13 -
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