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<!-- * Set ALLOWTOPICCHANGE = P1076AdminGroup --> ---+ P1076 September 26, 2013 Meeting Minutes ---++ Attendees: * Main.RyanHinton * Main.CliffordWalinsky * Main.JimLewis ---++ Agenda: * Review [[IssueScreening][ISAC issues and Bugzilla]] * Check closure on AI from review lists. * Review items in the [[http://www.eda.org/twiki/bin/view.cgi/P1076/Vhdl2019CollectedRequirements][collected requirements list]] ---++ ISAC IR Review * Cliff W to research IR 2054, IR 2063, IR 2110 * IR2065 - AI Ryan Initial Proposal * IR2067 - Interfaces - cross reference interface proposals * IR2102 - move to done * IR2103 - add proposal and report as seeking use model input and can't go forward without it * IR2112 - If VHDL-2008 does not facilitate this already, we need to. * Did VHDL-2008 make the architecture declarative region contiguous with the entity, and hence, enable this? * AI Cliff ---++ New Proposals * Ryan: wants a declarative region between the generic and port clause for constants and subtypes * Cliff to look into whether port clauses are ordered, such that we can do something like: <verbatim> data_real : in sfixed; data_imag : in data_real'subtype; </verbatim> ---++ Review and Approve Meeting Minutes: * Motion: Ryan 2nd:Cliff ---++ Next Meeting Date (proposed): Thursday October 10, 8 am Pacific
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Topic revision: r6 - 2020-02-17 - 15:36:13 -
JimLewis
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