[vhdl-200x-ft] Revised FT18: condition operator

Folks,

Attached is a revision to the FT18 proposal document reflecting my
suggestions in my earlier email (also attached). The concensus was to adopt
the suggestions.

Cheers,

PA

--
Dr. Peter J. Ashenden                        peter@ashenden.com.au
Ashenden Designs Pty. Ltd.                   www.ashenden.com.au
PO Box 640                                   Ph:  +61 8 8339 7532
Stirling, SA 5152                            Fax: +61 8 8339 2616
Australia                                    Mobile: +61 414 70 9106

attached mail follows:

Folks,

I've just been looking over FT18 in preparation for drafting an LCS, and
have some suggestions.

1. I'd suggest using ?? for the unary operator symbol rather than
condition?. Currently, all operator symbols are either strings that don't
contain letters, or are reserved words. Reserved words are identifiers.
The string condition? isn't a reserved word, but does contain letters.
Using ?? instead will have less impact on lexers and be more consistent with
existing lexical conventions. It's also more lexically consistent with ?=.

2. I'd suggest defining ??[bit return boolean] in STANDARD and ??[std_ulogic
return boolean] in STD_LOGIC_1164. This would be consistent with our
principle of defining operations on a type in the same package as the type.
Legacy models won't be broken, since they won't have expressions of type bit
or std_ulogic as conditions, so the implicit invocation of ?? won't occur.
The only change would be that some previously illegal models would now be
legal (mostly with desired behaviour!).

3. I'd suggest the ?? operator be referred to as the condition operator,
since the term "equivalence" usually means the same thing as the equals
operator for boolean value.

4. Since the ?? operator is to have lowest precedence, along with if
expressions, the grammar can be

  expression ::=
    [ condition_operator ] if_expression

  if_expression ::=
    {logical_expression if condition , } logical_expression

  logical_expression ::=
      relation { and relation }
    | ...

Placing the optional condition operator in the expression grammar like this
is analogous to placing the optional sign in the production for
simple_expression. If you want to include a use of ?? within an expression,
you can always parenthesize, for example

  b1 /= (?? cs_n)

Comments?

Cheers,

PA

--
Dr. Peter J. Ashenden                        peter@ashenden.com.au
Ashenden Designs Pty. Ltd.                   www.ashenden.com.au
PO Box 640                                   Ph:  +61 8 8339 7532
Stirling, SA 5152                            Fax: +61 8 8339 2616
Australia                                    Mobile: +61 414 70 9106