David,
Handled by FT-03. Now once we have rolled in
1164 and 1076.3, I was wondering if we should
not be rolling some of the proposals together.
So as part of FT-03, it needs to be done.
Want to do it?
Cheers,
Jim
>
> These proposals represent the following functions:
>
> FUNCTION "and" ( l : std_logic_vector; r : std_ulogic ) RETURN
> std_logic_vector;
> FUNCTION "and" ( l : std_ulogic_vector; r : std_ulogic ) RETURN
> std_ulogic_vector;
> FUNCTION "and" ( l : std_ulogic; r : std_logic_vector ) RETURN
> std_logic_vector;
> FUNCTION "and" ( l : std_ulogic; r : std_ulogic_vector ) RETURN
> std_ulogic_vector;
> FUNCTION "nand" ( l : std_logic_vector; r : std_ulogic ) RETURN
> std_logic_vector;
> FUNCTION "nand" ( l : std_ulogic_vector; r : std_ulogic ) RETURN
> std_ulogic_vector;
> FUNCTION "nand" ( l : std_ulogic; r : std_logic_vector ) RETURN
> std_logic_vector;
> FUNCTION "nand" ( l : std_ulogic; r : std_ulogic_vector ) RETURN
> std_ulogic_vector;
> FUNCTION "or" ( l : std_logic_vector; r : std_ulogic ) RETURN
> std_logic_vector;
> ....
>
> I have included these into std_logic_1164, and numeric_std.
> However in copying these functions from numeric_std to numeric_bit
> I fund that there are no overloads such as the following:
>
> FUNCTION "and" ( l : bit_vector; r : bit ) RETURN bit_vector;
>
> Should I add these to the "std.standard" package for consistency?
>
-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787 Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~Received on Thu Jul 1 08:15:41 2004
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