[vhdl-200x-ft] Proposals 1164 CP-003 and 1076.3 N-002

From: David Bishop <dbishop@server.vhdl.org>
Date: Thu Jul 01 2004 - 07:11:36 PDT

These proposals represent the following functions:

     FUNCTION "and" ( l : std_logic_vector; r : std_ulogic ) RETURN
std_logic_vector;
     FUNCTION "and" ( l : std_ulogic_vector; r : std_ulogic ) RETURN
std_ulogic_vector;
     FUNCTION "and" ( l : std_ulogic; r : std_logic_vector ) RETURN
std_logic_vector;
     FUNCTION "and" ( l : std_ulogic; r : std_ulogic_vector ) RETURN
std_ulogic_vector;
     FUNCTION "nand" ( l : std_logic_vector; r : std_ulogic ) RETURN
std_logic_vector;
     FUNCTION "nand" ( l : std_ulogic_vector; r : std_ulogic ) RETURN
std_ulogic_vector;
     FUNCTION "nand" ( l : std_ulogic; r : std_logic_vector ) RETURN
std_logic_vector;
     FUNCTION "nand" ( l : std_ulogic; r : std_ulogic_vector ) RETURN
std_ulogic_vector;
     FUNCTION "or" ( l : std_logic_vector; r : std_ulogic ) RETURN
std_logic_vector;
....

I have included these into std_logic_1164, and numeric_std.
However in copying these functions from numeric_std to numeric_bit
I fund that there are no overloads such as the following:

     FUNCTION "and" ( l : bit_vector; r : bit ) RETURN bit_vector;

Should I add these to the "std.standard" package for consistency?

-- 
David W. Bishop dbishop@vhdl.org       All standard disclaimers apply.
Received on Thu Jul 1 07:11:40 2004

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