Re: [vhdl-200x] A Challenge

I like the idea of "implicit parameter and port connections", but not the proposed implementations.  In my experience, I mostly want to use signals from a package inside of the package's procedures (without having to pass all of them in/out of the procedure).  I think the desired goal of this proposal could be meet if there were a way to get the package's signals inside the procedure's scope.  Could it be done with something akin to C's extern keyword?

Sorry if this isn't the proper way to make comments - I'm just getting my feet wet here.
 - Woody
-----Original Message-----
>From: Jim Lewis <jim@synthworks.com>
>Sent: Apr 27, 2015 12:21 PM
>To: "vhdl-200x@eda.org" <vhdl-200x@eda.org>
>Subject: [vhdl-200x] A Challenge
>
>Hi,
>Our current PAR expires at the end of 2015.  I have applied for an extension, which we should be able to get.
>
>OTOH, if we could consider getting a set of work done and balloted by then.   What I would like you to do then is look over the proposals.  Are there one to three that would really make a difference 
>in your work, that are minimal risk of unintended side effects, and that you would perhaps be willing to help work on the LCS for?
>
>Please reply to this with your list and why you need the item.  We can talk about it in the meeting  on Thursday.
>
>Best Regards,
>Jim
>
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>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>Jim Lewis                                  Jim@SynthWorks.com
>VHDL Training Expert                       http://www.SynthWorks.com
>IEEE VHDL Working Group Chair
>OSVVM, Chief Architect and Cofounder
>1-503-590-4787
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