Re: [vhdl-200x] Request for Opinion: Should 1076.6 be subsumed into the main 1076 standard?

No. 1076.6 isn't "VHDL"; it's simply a subset of VHDL which synthesis 
vendors are expected to handle in a consistent way. It reflects the 
lowest common subset of functionality that was expected from synthesis 
tools at the specific time that the standard was written. In my opinion, 
it would be a major mistake to cast this in stone as part of "VHDL". It 
is domain-specific implementation, not language, and is not related to 
the core language and its definition. This would be rather like changing 
the C or C++ standards to show what Microsoft had achieved in Visual C++ 
6.0, for example.

We'd also have issues with people believing that VHDL defined concepts 
such as "flip flops", clocks, resets, and so on, because "it's in the LRM".

Finally, some of us will remember that there was a certain amount of 
politics in the original 1076.6. With hindsight, this was probably the 
start of a very long and slippery path, which has ended with the IEEE 
rubber-stamping vendor-defined standards. This is itself, IMO, reason 
enough to keep 1076.6 at arm's length from the core language.

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