Hi,
_Next Meeting_: Thursday August 11 at 8 am Pacific Daylight Time.
_Dial-in details_:
Dial in 1-800-637-5822
Intl Access: +1 647-723-3937
Passcode: 6850837
_Meeting agenda, sign-in, and request additional topics at_:
http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/MeetingWhiteboard
_Real-Time Meeting minutes for this meeting_ (if you are late)
http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/MeetingAugust11
_Meeting minutes from previous meeting_
http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/MeetingJuly28
_Action Items from July 28, Meeting_
All: Take ownership of items in the Raw Requirements area of Collect
Requirements and write proposals
http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/CollectedRequirements
Martin and David Koontz - Ask about need for Unicode extended identifiers
and comments in linked in groups and comp.lang.vhdl - get volunteers who
would be willing to work on proposals toward this.
Jim - revise P&P and do call for vote
David Koontz - provide example(s) of verification problem that cannot be
handled without a solver - ie: by procedural randomization - in which
items are randomized in a specific order.
_Older Action Items_
All: Comment on proposal formats
John Shields: Coordinate development of requirements template
Chris Higgs: Extend Record Introspection to include transformations
between composites (record, multidimensional array, or
array of arrays) and vectors
Chris Higgs: Add use models to both proposals
Best,
Jim Lewis
VHDL Study Group Chair
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http://www.eda-twiki.org/vasg/index.html#Participation
-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787 Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Jul 28 13:29:21 2011
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