Re: [vhdl-200x] Re: What's next in VHDL

From: Jim Lewis <>
Date: Mon Mar 28 2011 - 08:52:10 PDT

Hi David,
> On 28/03/11 4:19 PM, Jim Lewis wrote:
>> For VHDL-87 read the preface.
> The first sentence of the Preface reads:
> (This Preface is not a part of IEEE Std 1076-1987, IEEE Standard VHDL
> Language Reference Manual.)
While this section is not binding on implementers of the standard,
it certainly does state the intent of the original language designers.
Your original question seemed to be, "Where does all of this interest
in verification with VHDL come from?" And my answer, it is contained
in the LRM.

> VHDL-2008:
> 1.3.5 Incorporation of Property Specification Language
Although the initial was initially done by the IEEE working group,
all work was handed over to the Accellera VHDL Technical Committee
for supplementation, refinement, and finalization. In Accellera process,
all change requests were ranked using a voting process.

It would probably be a good idea to an archive and organize of all
of the relevant Accellera documents from the VHDL-2008 and make them
accessable through the IEEE WG. Since you seem interested in the
history, you seem like a good candidate for the job. You can register
with Accellera to access group member documents without being an Accellera
member. At that point you should be able to access the priority list and
the other member documents. If/when they ask who you why you need access,
let them know you are archiving some of the documents for the IEEE VHDL
WG and cc me on the email.

> You could note that 1850 "Standard for PSL: Property Specification
> Language." was re-issued in 2010, ...
> . . .
> While I don't have an actual copy of 1850, will there be any VHDL-2012
> changes to support the new release?
Since IEEE only allows you to reference a current standard, I suspect
that we will be obliged to update VHDL for the new changes.

> You could further note that while interfaces are in keeping with P1647 TLM
> ...
> Is it the intent or requirement that VHDL-2012 be compatible at that level
> with P1647 (and will be standard pass before VHDL-2012 finalizes)?

IEEE 1850 was designed to be compatible with VHDL and other languages and
one of the syntax formats it accepts is a syntax similar to VHDL.

IEEE 1647 is not in any way similar to VHDL. Adding IEEE 1647 to VHDL
would make VHDL similar to SystemVerilog where they added dissimilar syntax
styles from other languages and basically came up with a Frankenstein
of a language. So I am not in favor of 1647 being the VHDL randomization

I think we need to go back to our Ada roots as much as is practical.
I do think protected types will probably result in VHDL OO in a
having a different encapsulation syntax. It appears that Ada-2005 has
made the Ada OO model similar to other OO languages.
There is some good stuff on Ada at:


Jim Lewis
Director of Training   
SynthWorks Design Inc. 
Expert VHDL Training for Hardware Design and Verification
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Received on Mon Mar 28 08:52:45 2011

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