Re: [vhdl-200x] Re: What's next in VHDL

On 28/03/11 4:19 PM, Jim Lewis wrote:
> For VHDL-87 read the preface.

The first sentence of the Preface reads:

  (This Preface is not a part of IEEE Std 1076-1987, IEEE Standard VHDL
  Language Reference Manual.)

I don't know of any other place in VHDL-87 where the word verification appears.

VHDL-93 LRM:

0.2.3 Front matter, examples, notes, references, and annexes

  Prior to this section are several pieces of introductory material;
  following the final section are some annexes and an index. The front
  matter, annexes,and index serve to orient and otherwise aid the user of
  this manual but are not part of the definition of VHDL.

Those items prior include the Abstract and the Introduction. Ditto 2002,
where you can note in an electronic copy the word verification only shows up
in the Abstract and Introduction.

VHDL-2008:

1.3.4 Front matter, examples, notes, references, and annexes

  Prior to this subclause are several pieces of introductory material;
  following Clause 24 are some annexes and an index. The front matter,
  annexes (except Annex B), and index serve to orient and otherwise aid the
  user of this standard, but are not part of the definition of VHDL;

The other mention of verification appears to relate to PSL (most commonly
verification unit(s)). IEEE 1850-2005 derives from the Accellera PSL v1.1 LRM.

VHDL-2008:

1.3.5 Incorporation of Property Specification Language

  VHDL incorporates the simple subset of the Property Specification
  Language (PSL) as an embedded language for formal specification of the
  behavior of a VHDL description. PSL is defined by IEEE Std 1850-2005. All
  PSL constructs that appear in a VHDL description shall conform to the
  VHDL flavor of PSL. Within this standard, reference is made to syntactic
  rules of PSL. Each such reference has the italicized prefix PSL_ and
  corresponds to the syntax rule in IEEE Std 1850-2005 with the same name
  but without the prefix.

We see evidence that verification became more than 'front matter' in
VHDL-2008 with PSL. There is nothing that demonstrates the how or why PSL
was included other than the PAR which mentions 'general language
enhancements in the areas of diesgn and verification of electronic systems'
and the issue voting record.

You could note that 1850 "Standard for PSL: Property Specification
Language." was re-issued in 2010, when approved the announcement contained:

  "The new version of IEEE 1850 will help hardware developers to reduce
  their verification time and costs," said Harry Foster, Chair of the IEEE
  1850 Working Group. "We collaborated with the working groups dealing with
  four other hardware language projects to support cross-language
  properties." The other projects are IEEE P1076*, IEEE Standard VHDL;
  IEEE P1364, Standard for Verilog Hardware Description Language; IEEE
  P1647, Standard for the Functional Verification Language 'e'; and IEEE
  P1800, Standard for SystemVerilog Hardware Description Language.

* P1076, etc. are trademarked apparently by IEEE as are full number
descriptions of standards titles.

While I don't have an actual copy of 1850, will there be any VHDL-2012
changes to support the new release?

You could further note that while interfaces are in keeping with P1647 TLM

Interfaces, they are useful (with different declaration scope) in
abstracting actual hardware descriptions (analogous to doing so in
schematics an abstraction layer similar to a detailed block diagram).

Is it the intent or requirement that VHDL-2012 be compatible at that level
with P1647 (and will be standard pass before VHDL-2012 finalizes)?

There appears to be a need for an 1850 compatability, a VHPI equivalent for
e. P1647 currently assumes ownership.

There appears to be a need for type resolution between e and VHDL for MVL.
Someone needs an enumeration literal alias.

All in all the impression other than interfaces is reminiscent of writing
verification control for a chip tester which is generally a good analog of
the abstraction necessary to compare models at two different levels of
abstraction.

There's an indication of various people being aware of these
issues/potential issues, but nothing readily apparent in print (or
electronic equivalent). The P1076 PAR is a little vague.

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