[vhdl-200x] Re: What's next in VHDL

From: Jim Lewis <Jim@synthworks.com>
Date: Sun Mar 27 2011 - 20:19:08 PDT

Hi David,
> ... Just curious how verification got so important to VHDL.
It has been there since day 1. For VHDL-87 read the preface.
For VHDL-93, VHDL-2002, and VHDL-2008 read both the abstract
and introduction.

The revised purpose of the PAR basically copies the text:
   VHDL is a formal notation intended for use in all phases
   of the creation of electronic systems. Since it is both
   machine and human readable, it supports the design,
   development, _verification_, synthesis, and
   _testing of hardware designs_; the communication of hardware
   design data; and the maintenance, modification, and
   procurement of hardware.

   This document is intended for the implementers of tools
   supporting the language and the advanced users of the language.

So updating the language for current verification techniques
is aligned with the original intent of the language.


Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
Expert VHDL Training for Hardware Design and Verification
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Received on Sun Mar 27 20:19:51 2011

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