Subject: Re: [vhdl-200x] Implicit conversion, Overloading, & Strong Typing
From: Hamish Moffatt (hamish_moffatt@agilent.com)
Date: Thu Dec 18 2003 - 15:13:54 PST
Jim Lewis wrote:
> I think mainly the VHDL community is not comfortable
> with the thought of "implicit conversions".
>
> The implicit conversions do nothing more than overloading
> a conditional expression to accept the types for which
> the implicit COND operator is defined.
The problem is that it's implicit, not that it's a conversion function
with overloading etc. The latter is fine.
> I have to admit, I did not like implicit boolean overloading
> at first. I did not think we could get a good enough
> proposal together to make it work in a clean manner.
> With the overloading of binary logic operators,
> I think we have a good, clean solution. When you look
> at the power of what we have, I think you will like it.
Overloading of the binary logic operators will be crucial too; otherwise
it's useless. Without it you can't write:
if clk and clk'event then
I think this should be clearly mentioned in the proposal too.
Regards
Hamish
-- Hamish Moffatt R&D Engineer Data Networks Division Agilent Technologies +61 3 9210 5782 (T210 5782) Tel
This archive was generated by hypermail 2b28 : Thu Dec 18 2003 - 15:17:28 PST