Subject: Re: [sv-ac] R29a/b Optional or mandatory name forassertions/properties/assumptions.
From: Bassam Tabbara (bassam@novas.com)
Date: Fri Sep 20 2002 - 12:10:19 PDT
Ok, it seems to me if we take the route of "auto-names" interface between tool/user, and tool/tool would be awkward (since likely we can't all agree on a rule to generate this name), again as Gail adequately described. Modules have names, instances have names .... why not assertions ?
Even Simon's car has a name, guess what is it ? "Simon's (more adjectives here for uniqueness) Car" :-)!
-Bassam.
Simon Davidmann wrote:
AdamSorry to be slow to catch up - but surely this generation of an auto-name
for me is wrong - you do not need to generate a name for me - that just
adds confusion.My parents gave me a name as they knew you would want to use it - thus I
have been named.However my car is not named - it just has a random serial number that I can
use if I ever need to.there is a big difference.
Simon
At 11:50 AM 9/18/2002, you wrote:
>Hi ovi1751;
>
>[BTW, that's my autogenerated name for you...]
>
> >I agree with Simon. Why force someone to name an assertion
> >if he or she is happy using the default generated names?
>
>Gail has presented many reasons for why a 'default generated'
>name can create problems.
>
>I've been thinking about proposing a requirement:
>
>'Simulators should create a signal from an assertion name
>and set it to 1/0 based on the pass/fail of the assertion
>so that a waveform viewer can display this pass/fail
>status of an assertion for easy identification of the time
>when an assertion fails.'
>
>It is highly useful to be able to see (in waveforms)
>
>If the usage of assertions by external tools necessitates
>a name (for consistency of results.) Then based on experience
>let's require one. The cost is not very great and this can
>prevent problems.
>
>
> Adam Krolnik
> Verification Mgr.
> LSI Logic Corp.
> Plano TX.
-- Dr. Bassam Tabbara Technical Manager, R&D Novas Software, Inc. bassam@novas.com (408) 467-7893
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