Re: [sv-ac] Re: R58c - access to past values ... with enable


Subject: Re: [sv-ac] Re: R58c - access to past values ... with enable
From: Adam Krolnik (krolnik@lsil.com)
Date: Fri Sep 20 2002 - 13:41:55 PDT


Hi Bassam;

Your theorized code
event the_clk: posedge(clk) && clk_en;

clock matched(the_clk) {

    .... = past(expr, 1) // prev(expr, 1)

}

Won't work. prev() evaluates separately from question of "should I
obtain this value or the previous, or previous..."

The clk_en is combinatorial AFTER the clock edge. Hence it affects
the following cycle. If I'm sitting at clock (#2) I want to
know:

1. If there was a clk_en generated in cycle #1 that would affect
   the new value in cycle #2.

2. If not #1, was there a clk_en generated in cycle #0 ...

3. If not #2, was there a clk_en generated in cycle #-1 ...

Do you like the idea of supporting enabled registers? Who likes the
idea of supporting access of values from enabled registers?
If we like the idea, only the implementation stands in the way...

  Thanks.

   Adam Krolnik
   Verification Mgr.
   LSI Logic Corp.
   Plano TX. 75074



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