P1076 March 31, 2016 Meeting Minutes
Attendees:
Rob Gaddi, Patrick Lehmann, Jim Lewis, Lieven Lemiengre, Ernst Christen, Brent Hayhoe
Agenda:
Meeting Discussion
Review and Approve Meeting Minutes:
Next Meeting: Thursday April 7, 2016, 11 am Pacific
Previous Meeting: Thursday March 24, 2016
Meeting Discussion
What's Next - see
PrivateDocuments
file: _summary_vhdl_requirements_priority.xlsx
March 3: 48: Protected Type: Shared Variables On Entity Interface
Allow shared variables.
?Also allow constants? Use model?
51: API for VHDL Assert Statements
AssertApi
For assert can be as simple as get_assert_count(Level: Severity_Level) returns total count as an integer
Call back mechanism would handle this nicely - can impact purity.
Proposal also requires handling for textio read errors
Arrays/composites of protected types.
Need some input from compiler writers as to why we currently disallow this.
AI talk to GHDL compiler writers about this.
With constraint that the array and/or composite only contains protected types.
With the constraint that can only reference an individual element of the array or composite
slicing - need for passing the array to subprogram
Aggregates?
Need to get back to interfaces and integers
Attributes for identifying clocks, reset, polarity
Restart at line 60
Review and Approve Meeting Minutes:
Rob, Patrick, Lieven
Next Meeting: Thursday
April 7, 2016
, 11 am Pacific
Previous Meeting: Thursday
March 24, 2016
This topic: P1076
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Topic revision: r3 - 2020-02-17 - 15:36:17 -
JimLewis
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