Re: VHDL-AMS PLI and a Question about the Simulation Cycle

Hi,

VHPI is now an IEEE standard, part of 1076.

Regards,
John Shields
Mentor Graphics, Inc.

Sameer Kher wrote:
> Hi All,
>
> I hope this is the right forum for my questions. If not, please let me
> know and I can post elsewhere.
>
> My first question was about whether there are any plans for a
> standardized Programming Language Interface for VHDL-AMS. I did come
> across the VHDL PLI site http://www.vhdl.org/vhdlpli/ but am not sure
> what the status is there.
>
> Also, I was seeking a clarification on the simulation cycle as described
> in the LRM. My question is related to step (g) where the next simulation
> time is determined. The text says that the next simulation cycle "...is
> determined by setting it to the earliest of :
> 	- The value of type universal_time corresponding to TIME'HIGH
> 	- The next time at which a driver becomes active, or
> 	- The next time at which a process resumes..."
> Does this imply that the analog solver must execute at every digital
> event?
> 	 
> Thanks,
> Sameer Kher
> R&D Engineer
> Ansoft Corp. 
>
>   


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