Improve designer productivity through enhancing conciseness, simplifying common occurrences of code, and improving capture of intent.

Enhance VHDL to allow (easy) modeling of functionality which is currently difficult or impossible.

Much of the work for this group will be done in conference calls and on the reflector.  Meeting dates will be announced on the reflector.  Start date should be March / April, 2003.

Send an email message majordomo@eda.org with subscribe vhdl-200x-mp in the message body (or use the link below).  You must join the reflector before you can post to it.

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