Re: [vhdl-200x-ft] Bit rules

From: Jim Lewis <Jim@SynthWorks.com>
Date: Tue Jul 06 2004 - 14:58:34 PDT

Ryan,
> PROPOSAL 4
>
> Define mixed signed/unsigned logic. Add "+", "*", "-", and "/" operators
> for all combinations of UFIXED/SFIXED. This is another fairly common
> operation in signal processing hardware that is well-defined. David noted
> that bit literals need a type cast anyway, so we shouldn't have the same
> problem as mixed arithmetic in numeric_std.

I have concerns about this:
Con:
   Based on usage of std_logic_arith, if we were to
   introduce a bit string literal format for these,
   these functions would limit the bit string literal
   to assignments.

   Remedy:
     Keep using conversion functions, there may be much
     to using this than a bit string literal format.

Con:
   In consistent with numeric_std. I like consistency.
   OTOH, I like necessary functionality too.

Pro:
   How else would we do: Y_SFIXED <= A_UFIXED - B_UFIXED ;

   With unsigned, there was a simple way to do this by
   extending the left index and type casting. However,
   here the indicies are important. What would happen to
   the indicies in:

     Y_SFIXED <= SFIXED('0' & A_UFIXED) - SFIXED('0' & B_UFIXED) ;

Question:
   Can you elaborate, "all combinations of UFIXED/SFIXED".
   I have some concerns about:
      Y_UFIXED <= A_UFIXED + B_SFIXED ;

   Too much overloading and it may be difficult to properly
   constuct a multi-operator expression:
     Y_UFIXED <= (A_UFIXED + B_SFIXED) + C_UFIXED ;
                  ^^^^^^^^^^^^^^^^^^^
                  Return of either SFIXED or UFIXED ok
                  with the concerned case.

Keep pounding on it.

Cheers,
Jim

-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787
Expert VHDL Training for Hardware Design and Verification
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Received on Tue Jul 6 14:58:36 2004

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