Re: [vhdl-200x-ft] Bit rules

Jim Lewis wrote:

> Ryan,
>
>> PROPOSAL 4
>>
>> Define mixed signed/unsigned logic. Add "+", "*", "-", and "/" operators
>> for all combinations of UFIXED/SFIXED. This is another fairly common
>> operation in signal processing hardware that is well-defined. David
>> noted
>> that bit literals need a type cast anyway, so we shouldn't have the same
>> problem as mixed arithmetic in numeric_std.
>
>
>
> I have concerns about this:
> Con:
> Based on usage of std_logic_arith, if we were to
> introduce a bit string literal format for these,
> these functions would limit the bit string literal
> to assignments.
>
> Remedy:
> Keep using conversion functions, there may be much
> to using this than a bit string literal format.

You can't use bit string literals in the fixed_pkg.
The reason for this is because the "ufixed" and "sfixed"
type are not bounded on either end.

You must cast bit literals to be what you want them to be:
a1 <= b1 + ufixed8_3("1010101010");

> Con:
> In consistent with numeric_std. I like consistency.
> OTOH, I like necessary functionality too.

Yah, but the reason for the consistency went away when we
used an unbounded type.

> Pro:
> How else would we do: Y_SFIXED <= A_UFIXED - B_UFIXED ;

I didn't think about this case. I'll add it.

> With unsigned, there was a simple way to do this by
> extending the left index and type casting. However,
> here the indicies are important. What would happen to
> the indicies in:
>
> Y_SFIXED <= SFIXED('0' & A_UFIXED) - SFIXED('0' & B_UFIXED) ;

This should work. I'll test it just to make sure.

> Question:
> Can you elaborate, "all combinations of UFIXED/SFIXED".
> I have some concerns about:
> Y_UFIXED <= A_UFIXED + B_SFIXED ;
>
> Too much overloading and it may be difficult to properly
> constuct a multi-operator expression:
> Y_UFIXED <= (A_UFIXED + B_SFIXED) + C_UFIXED ;
> ^^^^^^^^^^^^^^^^^^^
> Return of either SFIXED or UFIXED ok
> with the concerned case.

Anything operated on between a "ufixed" and an "sfixed" must
become an "sfixed". I have all of the cross combinations written,
but I didn't do "sfixed <= sfixed + unsigned" or "sfixed <= ufixed + signed"
Anybody see a need for them?

More important: Anybody willing to write test vectors for them?

-- 
NAME:     David W. Bishop           INTERNET: dbishop@vhdl.org