Re: [vhdl-200x-ft] Bit directions

From: Jim Lewis <Jim@SynthWorks.com>
Date: Tue Jul 06 2004 - 14:38:30 PDT

David and Ryan,
I am not excited about breaking the direction rules of
numeric_std unless there is a compelling reason to do so.

Can you elaborate the benefits of doing this?

Thanks,
Jim

> This one will leave us with an inconsistency to numeric_std (see below)
>
> Hinton, Ryan W @ CSW-SLC wrote:
>
>> PROPOSAL 2
>>
>> Change the interpretation of ascending ranges to maintain the bit values.
>> The killer feature of a fixed point type is that it gives an unambiguous
>> value to each bit. For a descending range, bit 0 has value 2**0, bit
>> -1 has
>> value 2**-1, etc. The current interpretation of ascending ranges negates
>> the bounds and swaps the directions. Here is an example
>>
>> -- descending --
>> descending range: ufixed(0 downto -3)
>> descending value: 1.110b = 1.75d
>>
>> -- old ascending --
>> ascending range: ufixed(-3 to 0)
>> descending range: ufixed(3 downto 0)
>> ascending value: 011.1b = 1.75d
>> descending value: 0.111b = 0.875d
>>
>> -- proposed ascending --
>> ascending range: ufixed(-3 to 0)
>> descending range: ufixed(0 downto -3)
>> ascending value: 011.1b = 1.75d
>> descending value: 1.110b = 1.75d
>>
>> Note that the proposed ascending range interpretation requires
>> reversing the
>> bits for the corresponding descending value, which differs from VHDL's
>> default matching rule (for implicit subtype conversions). This is
>> different, but I think it is the right solution. Again, the reason
>> for this
>> change is to maintain bit values.
>
>
> In numeric_std (numeric_bit, numeric_unsigned), all numbers are
> assumed to be of the format:
>
> unsigned (7 downto 0)
>
> Where "7" is the MSB, and "0" is the LSB. This is handled neatly
> in the code with the following:
> function RESIZE (ARG : UNSIGNED; NEW_SIZE : NATURAL) return UNSIGNED is
> alias INVEC : UNSIGNED(ARG'LENGTH-1 downto 0) is ARG;
>
> Since every argument goes through the "resize" function, this has
> the effect of transforming "to" to "downto" variables as follows:
> variable a8r : unsigned (0 to 7) := "01001110"; -- 78
> variable a8 : unsigned (7 downto 0) := "00000000"; -- 0
> begin
> a8 := a8r + a8;
> assert (a8 = 78)
> This was done so that 'a8 := a8 + "01001110"' would come out correct.
>
> Now, when we extend this functionality to the fixed point packages:
> variable a8r : ufixed (-1 to 7) := "010011100"; -- 78.0
> variable a8 : ufixed (7 downto -1) := "000000000"; -- 0
> begin
> a8 := a8r + a8;
> assert (a8 = 78)
>
> With the above proposal, we will get 57.
> Note that there is no need for the 'a8 := a8 + "010011100"' because
> you need to type cast the "010011100" anyway to give it a defined range.
>
> Do we be consistent with "numeric_std" or do we go on? Note that I
> tried to implement this proposal and it wouldn't synthesize. Ryan is
> also not the first to propose this.
>

-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787
Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Received on Tue Jul 6 14:38:33 2004

This archive was generated by hypermail 2.1.8 : Tue Jul 06 2004 - 14:38:34 PDT