Subject: Assertions Meeting
From: Stephen Bailey (SBailey@model.com)
Date: Wed Jun 18 2003 - 10:07:25 PDT
I will hopefully be able to confirm the meeting by end of this week or early
next.
Details:
Where: Wilsonville, OR (Mentor Graphics)
When: 2.5 days, 9 - 11 July (1/2 day on friday 11 Jul)
Agenda:
- Overview of PSL. I'm hoping Erich Marschener or someone else will be
able to provide everyone with an overview of PSL.
- Integrating PSL with VHDL. What needs to be done other than eliminating
the comments for the embedded PSL use model. What technical issues there
might be.
- Any related language changes. For example, the request to allow reading
OUT mode ports was driven by ABV needs.
- Outline a technical proposal. I'm hopeful that we can generate the
outline for a technical proposal which we can then work in the succeeding
weeks/months.
---- Stephen A. Bailey TME, Model Technology 1811 Pike Road, Building #2, Suite F Longmont, CO 80501 sbailey@model.com 303-775-1655 (mobile) 720-494-1202 (office) 720-494-0457 (fax) www.model.com
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