Re: [vhdl-200x] Relax locally static restrictions?

On 01/04/15 05:40, Daniel Kho wrote:
> Hi all,
> I'm wondering if there is a reason to only allow locally static
> expressions in array aggregates? Why can't we pass generic constants
> from a higher level hierarchy to form the expressions for choices in
> array aggregates?
>
> I find the LRM rather restrictive in how named associations of array
> aggregates are only "allowed to have a choice that is not locally
> static, or likewise a choice that is a null range, only if the aggregate
> includes a single element association and this element association has a
> single choice".
>
> Is there some history on why such a restriction is in place?

There is at least one good reason for that: choices can be checked at
analysis time (to detect holes or overlap).

Each time there is a requirement for locally staticness, this means
the analyzer has to do some checks.

> I find many FPGA designers (myself included) would like to be able to do
> the following, i.e. be able to pass a globally static generic into a
> discrete range of an array aggregate. However, I believe the LRM only
> allows locally static discrete ranges for the choices in array
> aggregates. However, we would like to be able to have globally static
> discrete ranges as well. Is there something stopping us from doing the
> following?
>
> entity test is
>      generic(width: integer := 10; lanes: integer := 8);
>      port(
>          in1: in std_ulogic_vector(width*lanes-1 downto 0);
>          q: out std_ulogic
>      );
> end entity test;
>
> architecture rtl of test is
>      constant mask: std_ulogic_vector(width*lanes-1 downto 0) :=
> (width*lanes-1 downto width => '0', others => '1');
> begin
>      q <= '1' when (in1 and mask) = mask else '0';
> end architecture rtl;

What about:

(width*lanes-1 downto width => 0) & (width -1 downto 0 => '1')

Tristan.


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