RE: [vhdl-200x] Interfaces with normal, conjugated and monitor flavours

> -----Original Message-----
> Tristan Gingold
> Sent: 19 February 2015 06:20
> On 18/02/15 15:40, John.Aasen@kongsberg.com wrote:
<snip>
> I think this proposal is a good one: it is easy to understand (conjugate and
> monitor concepts are clear), and it looks not too difficult to implement.  (I
> also think this is a feature asked by users).
> 

I too like this proposal. Using the type syntax and attributes also seem like good ideas.  Would there also need to be a convention that interfaces are defined from a "master" perspective so that the meaning of 'conjugate is always to create a slave-type interface?

<snip>

> 
> Few little comments about your examples:
> 
> > entity master is
> >    port (
> >      clk : in std_logic;
> >      bus : interface i_cpu_bus
> 
> Should we require the 'interface' word here ?
> Maybe it clarify the user intent, so I am not opposed to that.
> 
> >      );
> > end entity;
> 
> >
> > --Slave entity - reverses direction for 'in' and 'out' interface
> > elements
> >
> > entity slave is
> >    port (
> >      clk : in std_logic;
> >      bus : conjugated i_cpu_bus
> 
> Let's propose:
>         bus : interface i_cpu_bus'conjugated; or
>         bus : i_cpu_bus'conjugated;
> (I am not a native English speaker, but there might be a better
>   word than conjugated.  Maybe reverse ?)

I'd avoid 'reverse as it has connotations already (of reversing the bits in a vector). 'conjugate would sound better to my ears - most (all?) of our current attributes are nouns, so it would read as "the conjugate of i_cpu_bus" (like clk'event->"an event of clk").

"Opposite" might be a more familiar word to non-native speakers ("conjugate" also has specific mathematical meanings which in an engineering context is maybe best not overloaded?)

<snip>

Martin

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