> Some have requested the ability to create a target sized result. > I would be concerned if this were to impact something other than > + and -. I haven't really been following this, but I wouldn't do that - this is essentially what screwed up Verilog expression sizing. There are other issues, like when extension and signedness conversion are carried out, but creating 'target-sized results' is at the root of it, and leads to the confusion on what is self-determined and what is context-determined. Perhaps not very relevant, but Stroustrup says in the "The C++ Programming Language", when justifying why the return type isn't used in overload resolution, that "it is not considered the compiler's job to decide which precision the programmer might want for the addition". Seems to me to be a valid rationale in pretty much any language. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Apr 25 10:55:22 2013
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