Hi Andy, > Adding additional operators is often clumsy, unnecessarily > adds bulk to the language, and needless implementation work > for the tool vendors. Some have requested the ability to create a target sized result. I would be concerned if this were to impact something other than + and -. Going further for + and -, I would only want it to be able to produce accumulate and lossless operations and not general resizing. In addition, how would it work for multiple operator expressions: Y17 <= (A16 + B16) + (C16 + D16) ; > (e.g. "which addition operator do I use here?"). It would take some care with the operator symbols. Taking a WAG at it, accumulate could be @+ and lossless could be #+. Once established, I think people know the difference between accumulation and summing. > After thinking about it last night, my new-for-vhdl-2008 trick for counters might be (to borrow a page from your paper): > > Variable count : ufixed(3 downto 0); > > Variable overflow : ufixed(0 downto 0); > > (overflow, count) := count + 1; > > (overflow, count) := count - 1; -- using fixed_wrap I like this. I will add it to the slides David and I did. Fixed_saturate is on the package instance of fixed_pkg. Do you use your own instance instead? Jim -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-320-0782 Expert VHDL training with a focus on hardware design and test. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Apr 25 09:52:18 2013
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