Date: Thu Apr 04 2013 - 12:24:00 PDT
Kevin: Yes, the "sel" function with anonymous types would work. I'm fine with that solution. As you and Jim pointed out, once anonymous types are added, writing the function(s) is a relatively lightweight change -- which I value. As Andy mentioned, defining this function in a standard package will likely cause conflicts with some existing packages. And I think the new syntax options "read" more naturally for me. So my preference is to add the new syntax, but the function is an acceptable alternative. - Ryan From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of Jennings, Kevin Sent: Thursday, April 04, 2013 12:30 PM To: vhdl-200x@eda.org Subject: RE: EXTERNAL: [vhdl-200x] VHDL ternary operation To your point about "rather have this feature with a mediocre syntax than put it off for yet another language revision...", the feature is available now as a function so if you're OK with the syntax "sel(Cond, If_True, If_False)" then you're set and don't need any language revision...but somebody does have to write the body of the function for every conceivable type To your point about "However, occasional use of a ternary expression e.g. in a constant initialization sure beats writing a ~8 line function to do an "if" statement.", this can be solved if the language were to allow for anonymous type which has already been proposed ( http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/AnonymousTypes) Bottom line is that if anonymous types on function arguments becomes part of the language, then only one (or perhaps a small handful) of functions need be written and put into a new standard package. Kevin Jennings, P.E. | Senior Staff Engineer | www.burroughs.com Burroughs | 41100 Plymouth Road | Plymouth, Michigan 48170 | 734-737-4268 | 734-737-4740 THIS COMMUNICATION MAY CONTAIN CONFIDENTIAL AND/OR OTHERWISE PROPRIETARY MATERIAL and is thus for use only by the intended recipient. If you received this in error, please contact the sender and delete the e-mail and its attachments from all computers. From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of ryan.w.hinton@L-3com.com Sent: Thursday, April 04, 2013 12:36 PM To: vhdl-200x@eda.org Subject: RE: EXTERNAL: [vhdl-200x] VHDL ternary operation I like the extensibility of this form (multiple "when..or" pairs), but I don't like that it puts the condition in the middle of the construct. Just my opinion. Stepping back, I would rather have this feature with a mediocre syntax than put it off for yet another language revision while waiting to find the perfect syntax. I think almost any language construct can become unwieldy -- especially in the hands of a poor designer. In particular, ternary expressions are infamous for being hard to read in any language. So I don't think we're going to find a beautiful solution here. However, occasional use of a ternary expression e.g. in a constant initialization sure beats writing a ~8 line function to do an "if" statement. In other words, ternary expressions can be ugly -- or even unreadable if used poorly. But in the right circumstances, they're very much better than the alternative. As long as I'm giving opinions, I like the language-assisted options (e.g. "when...else" or "if...else") forms better than the subprogram form that Jim offered. The former "read" better to me. But I am starting to warm up to Jim's anonymous types in general. Enjoy! - Ryan From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of john.aynsley@doulos.com Sent: Thursday, April 04, 2013 10:24 AM To: vhdl-200x@eda.org Cc: owner-vhdl-200x@eda.org Subject: Re: EXTERNAL: [vhdl-200x] VHDL ternary operation An off-the-wall suggestion. A <= either B when C or D after 1 ns; E := (either F when G or H when J or K) + (either (either L when M or N) when P or Q ); Cheers, John A From: Jim Lewis <Jim@synthworks.com> To: vhdl-200x@eda.org, Date: 04/04/2013 16:09 Subject: Re: EXTERNAL: [vhdl-200x] VHDL ternary operation Sent by: owner-vhdl-200x@eda.org ________________________________ Hi Andy, > If we continue to "cryptify" the VHDL language, we are only accelerating its demise. I agree. WRT readability, any of the language syntax candidates get ugly quick. If you use "when" then you have to add parens to disambiguate it from the conditional assignment form. While ok for assignments, it would be odd requiring it in initializations (such as a constant). It would also be ugly to have signals and delays present. Such as signal assignments and expressions: -- signal assignment Y <= A after 3 ns when C else B after 4 ns ; -- Expression Y <= (A when C else B) after 4 ns ; There may be other issues here I am forgetting about. For 2008, we considered the keyword "if" instead of "when". I don't recommend this either. It may be ok if everyone dropped the assignment form with "when" and just used "if". OTOH, if you consider it WRT to the simplified conditionals, then one can write: if (A if C else B) then Even with the parens it is real ugly. I would particularly hate to have a cryptic form, such as "C ? A : B" As I mentioned before, I would rather have anonymous ports on subprograms and a general function for multiplexors (we already have requests for small logic like this): if Mux2(C, A, B) then Perhaps it would be more general named in a software sense and named it something like Sel2: if Sel2(C, A, B) then The ugly things that can happen here is if a design uses Sel2 as a signal name, but that is ok as it is taken care of by normal scoping rules. The only time it would be an issue is if the signal is declared in a package - which most designs do not do since there has been no historical support by synthesis tools. I like having the size specified in the name as it also gives some information about the dimensions of the select input. However, a good argument could convince me otherwise. Jim -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com <mailto:Jim@SynthWorks.com> SynthWorks Design Inc. http://www.SynthWorks.com <http://www.synthworks.com/> 1-503-320-0782 Expert VHDL training with a focus on hardware design and test. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner <http://www.mailscanner.info/> , and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner <http://www.mailscanner.info/> , and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner <http://www.mailscanner.info/> , and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
